公开(公告)号：US20090311846A1

公开(公告)日：2009-12-17

申请号：US12466178

申请日：2009-05-14

申请人： Dong-Woon Shin ,  Soo-jin Hong ,  Guk-hyon Yon ,  Si-young Choi ,  Sun-ghil Lee

发明人： Dong-Woon Shin ,  Soo-jin Hong ,  Guk-hyon Yon ,  Si-young Choi ,  Sun-ghil Lee

IPC分类号： H01L21/762

CPC分类号： H01L21/76229 ,  H01L21/823878 ,  H01L27/10894 ,  H01L27/11546

摘要： A mask pattern is formed on a semiconductor substrate in which a cell region, a PMOS region, and an NMOS region are defined. Trenches are formed in the cell region, the PMOS region, and the NMOS region. A sidewall oxide layer and a protection layer are formed in the trenches, and a portion of the protection layer in the PMOS region is removed. A first device isolation insulating layer is formed on the substrate, filling the trenches. Portions of the first device isolation insulating layer are removed to expose the mask pattern and the trenches of the cell region and the NMOS region and to leave a portion of the first device isolation insulating layer in the trench in the PMOS region. A liner is formed on the portion of the first device isolation region in the trench in the PMOS region and conforming to sidewalls of the trenches in the cell region and the NMOS region. A second device isolation insulating layer is formed on the substrate, filling the trenches in the cell region and the NMOS region. Portions of the second device isolation insulating layer are removed to expose the mask pattern and to leave portions of the second device isolation insulating layer in the trenches of the cell region and the NMOS region.

摘要翻译： 在其中限定了单元区域，PMOS区域和NMOS区域的半导体衬底上形成掩模图案。 在单元区域，PMOS区域和NMOS区域中形成沟槽。 在沟槽中形成侧壁氧化物层和保护层，并且去除PMOS区域中的保护层的一部分。 在衬底上形成第一器件隔离绝缘层，填充沟槽。 去除第一器件隔离绝缘层的部分以露出掩模图案和单元区域和NMOS区域的沟槽，并且在PMOS区域的沟槽中留下第一器件隔离绝缘层的一部分。 衬垫形成在PMOS区域的沟槽中的第一器件隔离区域的部分上，并且与衬底区域和NMOS区域中的沟槽的侧壁一致。 在衬底上形成第二器件隔离绝缘层，填充单元区域和NMOS区域中的沟槽。 去除第二器件隔离绝缘层的部分以暴露掩模图案并且将第二器件隔离绝缘层的部分留在单元区域和NMOS区域的沟槽中。

公开(公告)号：US07871897B2

公开(公告)日：2011-01-18

申请号：US12466178

申请日：2009-05-14

申请人： Dong-woon Shin ,  Soo-jin Hong ,  Guk-hyon Yon ,  Si-young Choi ,  Sun-ghil Lee

发明人： Dong-woon Shin ,  Soo-jin Hong ,  Guk-hyon Yon ,  Si-young Choi ,  Sun-ghil Lee

IPC分类号： H01L21/762

CPC分类号： H01L21/76229 ,  H01L21/823878 ,  H01L27/10894 ,  H01L27/11546

摘要： A mask pattern is formed on a semiconductor substrate in which a cell region, a PMOS region, and an NMOS region are defined. Trenches are formed in the cell region, the PMOS region, and the NMOS region. A sidewall oxide layer and a protection layer are formed in the trenches, and a portion of the protection layer in the PMOS region is removed. A first device isolation insulating layer is formed on the substrate, filling the trenches. Portions of the first device isolation insulating layer are removed to expose the mask pattern and the trenches of the cell region and the NMOS region and to leave a portion of the first device isolation insulating layer in the trench in the PMOS region. A liner is formed on the portion of the first device isolation region in the trench in the PMOS region and conforming to sidewalls of the trenches in the cell region and the NMOS region. A second device isolation insulating layer is formed on the substrate, filling the trenches in the cell region and the NMOS region. Portions of the second device isolation insulating layer are removed to expose the mask pattern and to leave portions of the second device isolation insulating layer in the trenches of the cell region and the NMOS region.

摘要翻译： 在其中限定了单元区域，PMOS区域和NMOS区域的半导体衬底上形成掩模图案。 在单元区域，PMOS区域和NMOS区域中形成沟槽。 在沟槽中形成侧壁氧化物层和保护层，并且去除PMOS区域中的保护层的一部分。 在衬底上形成第一器件隔离绝缘层，填充沟槽。 去除第一器件隔离绝缘层的部分以露出掩模图案和单元区域和NMOS区域的沟槽，并且在PMOS区域的沟槽中留下第一器件隔离绝缘层的一部分。 衬垫形成在PMOS区域的沟槽中的第一器件隔离区域的部分上，并且与衬底区域和NMOS区域中的沟槽的侧壁一致。 在衬底上形成第二器件隔离绝缘层，填充单元区域和NMOS区域中的沟槽。 去除第二器件隔离绝缘层的部分以暴露掩模图案并且将第二器件隔离绝缘层的部分留在单元区域和NMOS区域的沟槽中。