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公开(公告)号:US08358034B2
公开(公告)日:2013-01-22
申请号:US12706430
申请日:2010-02-16
申请人: Dusan Graovac , Andreas Pechlaner , Benno Koeppl
发明人: Dusan Graovac , Andreas Pechlaner , Benno Koeppl
摘要: In accordance with an embodiment, a circuit includes voltage supply terminals configured to provide an AC output voltage, at least two converter units, and a control circuit. Each converter unit includes input terminals configured to be connected to an electrical charge storage unit, output terminals, and a switch arrangement connected between the input and output terminals. The switch arrangement is configured to receive a control signal, and provide an output voltage having a duty-cycle dependent on the control signal. The control circuit is configured to provide a set of parameter sets that are dependent on a desired output voltage waveform, define a duty-cycle, and generate the control signals for the at least two converter units such that one parameter set is selected from the set of parameter sets is assigned to one converter unit, and the assignment of parameter sets to the converter stages varies over time.
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公开(公告)号:US08395280B2
公开(公告)日:2013-03-12
申请号:US12706430
申请日:2010-02-16
申请人: Dusan Graovac , Andreas Pechlaner , Benno Koeppl
发明人: Dusan Graovac , Andreas Pechlaner , Benno Koeppl
CPC分类号: H02M7/42 , B60L3/0046 , B60L11/1853 , B60L11/1864 , H02J7/0024 , H02M7/79 , H02M2007/4835 , Y02T10/7005 , Y02T10/7055 , Y02T10/7061 , Y10T307/707
摘要: In accordance with an embodiment, a circuit includes voltage supply terminals configured to provide an AC output voltage, at least two converter units, and a control circuit. Each converter unit includes input terminals configured to be connected to an electrical charge storage unit, output terminals, and a switch arrangement connected between the input and output terminals. The switch arrangement is configured to receive a control signal, and provide an output voltage having a duty-cycle dependent on the control signal. The control circuit is configured to provide a set of parameter sets that are dependent on a desired output voltage waveform, define a duty-cycle, and generate the control signals for the at least two converter units such that one parameter set is selected from the set of parameter sets is assigned to one converter unit, and the assignment of parameter sets to the converter stages varies over time.
摘要翻译: 根据实施例,电路包括被配置为提供AC输出电压的电压供给端子,至少两个转换器单元和控制电路。 每个转换器单元包括被配置为连接到电荷存储单元,输出端子和连接在输入和输出端子之间的开关装置的输入端子。 开关装置被配置为接收控制信号,并提供具有取决于控制信号的占空比的输出电压。 控制电路被配置为提供依赖于期望输出电压波形的一组参数组,定义占空比,并且生成用于至少两个转换器单元的控制信号,使得从该组中选择一个参数组 的参数集分配给一个转换器单元,并且转换器级的参数集的分配随时间而变化。
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公开(公告)号:US20110198936A1
公开(公告)日:2011-08-18
申请号:US12706430
申请日:2010-02-16
申请人: Dusan Graovac , Andreas Pechlaner , Benno Koeppl
发明人: Dusan Graovac , Andreas Pechlaner , Benno Koeppl
IPC分类号: H02M7/42
CPC分类号: H02M7/42 , B60L3/0046 , B60L11/1853 , B60L11/1864 , H02J7/0024 , H02M7/79 , H02M2007/4835 , Y02T10/7005 , Y02T10/7055 , Y02T10/7061 , Y10T307/707
摘要: Disclosed is a circuit arrangement including at least one multi-level-converter.
摘要翻译: 公开了一种包括至少一个多电平转换器的电路装置。
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公开(公告)号:US20110267005A1
公开(公告)日:2011-11-03
申请号:US12772719
申请日:2010-05-03
申请人: Peter Gollob , Andreas Pechlaner , Uschi Pechlaner
发明人: Peter Gollob , Andreas Pechlaner , Uschi Pechlaner
IPC分类号: H02J7/00
CPC分类号: H02J7/0014 , G01R31/3658 , H01M10/441 , H01M10/46 , H01M2010/4271 , H02J7/0019
摘要: A charge balancing circuit and an energy storage arrangement with a charge balancing circuit are disclosed.
摘要翻译: 公开了一种电荷平衡电路和具有电荷平衡电路的能量存储装置。
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公开(公告)号:US07017072B1
公开(公告)日:2006-03-21
申请号:US10089650
申请日:2000-09-26
申请人: Jens Barrenscheen , Mario Keil , Hermann Kern , Andreas Pechlaner
发明人: Jens Barrenscheen , Mario Keil , Hermann Kern , Andreas Pechlaner
IPC分类号: G06F11/00
CPC分类号: H04L12/40169 , H04L12/40032 , H04L69/40 , H04L2012/40215 , H04L2012/40273
摘要: The invention relates to a protection circuit (12) for an access-arbitrated bus system network, comprising a fault detection device for detecting a fault status in a sub-network of the overall bus system network; and a separating device for separating the sub-network from the overall network when a fault status is detected in said sub-network.
摘要翻译: 本发明涉及一种用于接入仲裁总线系统网络的保护电路(12),包括用于检测总线总线系统网络的子网络中的故障状态的故障检测装置; 以及分离装置,用于当在所述子网中检测到故障状态时,将所述子网与所述整个网络分离。
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