公开(公告)号：US09361419B2

公开(公告)日：2016-06-07

申请号：US14453585

申请日：2014-08-06

Applicant: ESS Technology, Inc.

Inventor： Robert L. Blair ,  Daniel A. Risler ,  A Martin Mallinson

IPC: G06F17/50 ,  H01L27/02

CPC classification number: G06F17/5072 ,  G06F17/5045 ,  G06F17/5068 ,  G06F17/5077 ,  G06F17/5081 ,  H01L27/0207

Abstract: An improved method for the placement and routing of compound elements, each comprising a series/parallel combination of nominally identical elements, is disclosed. The method treats each compound element as a separate cell (the sub-circuit construct commonly used in silicon chip design) so as to treat as a unit all the nominally identical elements that make up a compound value, and place them as a single group in the design of a chip. This results in the compound elements being placed as units and routed in such a way that all of the nominal elements are located together and any effects between compound values are thus relatively localized and optimally isolated.

Abstract translation: 公开了一种用于放置和布线化学元件的改进方法，每个复合元件包括名义上相同的元件的串联/并联组合。 该方法将每个复合元素作为单独的单元（通常用于硅芯片设计的子电路构造）来处理，以便将作为单位的所有名义上相同的元素作为单元处理，并将它们作为单个组 芯片的设计。 这导致复合元素被放置为单元并以这样的方式布线，使得所有标称元素位于一起，并且化合物值之间的任何影响因此相对局部化并且被最佳隔离。

公开(公告)号：US20150046894A1

公开(公告)日：2015-02-12

申请号：US14453585

申请日：2014-08-06

Applicant: ESS Technology, Inc.

Inventor： Robert L. Blair ,  Daniel A. Risler ,  A Martin Mallinson

IPC: G06F17/50

CPC classification number: G06F17/5072 ,  G06F17/5045 ,  G06F17/5068 ,  G06F17/5077 ,  G06F17/5081 ,  H01L27/0207

Abstract: An improved method for the placement and routing of compound elements, each comprising a series/parallel combination of nominally identical elements, is disclosed. The method treats each compound element as a separate cell (the sub-circuit construct commonly used in silicon chip design) so as to treat as a unit all the nominally identical elements that make up a compound value, and place them as a single group in the design of a chip. This results in the compound elements being placed as units and routed in such a way that all of the nominal elements are located together and any effects between compound values are thus relatively localized and optimally isolated.

Abstract translation: 公开了一种用于放置和布线化学元件的改进方法，每个复合元件包括名义上相同的元件的串联/并联组合。 该方法将每个复合元素作为单独的单元（通常用于硅芯片设计的子电路构造）来处理，以便将作为单位的所有名义上相同的元素作为单元处理，并将它们作为单个组 芯片的设计。 这导致复合元素被放置为单元并以这样的方式布线，使得所有标称元素位于一起，并且化合物值之间的任何影响因此相对局部化并且被最佳隔离。