Method for collapsing the prolog and epilog of software pipelined loops
    1.
    发明授权
    Method for collapsing the prolog and epilog of software pipelined loops 有权
    破解软件流水线循环的序言和epilog的方法

    公开(公告)号:US06754893B2

    公开(公告)日:2004-06-22

    申请号:US09732257

    申请日:2000-12-07

    IPC分类号: G06F945

    CPC分类号: G06F8/4452

    摘要: A method for reducing a code size of a software pipelined loop, the software pipelined loop having a kernel and an epilog. The method includes first evaluating a stage of the epilog. This includes selecting a stage of the epilog to evaluate (504) and evaluating an instruction in a reference stage. This includes identifying an instruction in the reference stage that is not present in the selected stage of the epilog (506) and determining if the identified instruction can be speculated (508). If the identified instruction can be speculated, such is noted. If the instruction cannot be speculated, it is determined whether the identified instruction can be predicated (512). If the instruction can be predicated, it is marked as needing predication (514). Next, it is determined if another instruction in the reference stage is not present in the selected stage of the epilog (510). If there is, the instruction evaluation is repeated. If there is another stage of the epilog to evaluate, the evaluation is repeated (518).

    摘要翻译: 一种用于减少软件流水线循环的代码大小的方法,软件流水线循环具有内核和epilog。 该方法包括首先评估epilog的阶段。 这包括选择epilog的阶段来评估(504)并评估参考阶段中的指令。 这包括识别参考阶段中在epilog(506)的所选阶段中不存在并且确定所识别的指令是否可以被推测的指令(508)。 如果可以推测识别的指令,则可以这样说明。 如果不能推测该指令,则确定所识别的指令是否可以被预测(512)。 如果指令可以被预测,则将其标记为需要的预测(514)。 接下来,确定参考阶段中的另一个指令是否不存在于epilog(510)的选定阶段中。 如果有,重复说明评估。 如果有另一个阶段的epilog评估,重复评估(518)。

    Method for software pipelining of irregular conditional control loops
    2.
    发明授权
    Method for software pipelining of irregular conditional control loops 有权
    不规则条件控制回路软件流水线方法

    公开(公告)号:US06892380B2

    公开(公告)日:2005-05-10

    申请号:US09733254

    申请日:2000-12-08

    IPC分类号: G06F9/45

    CPC分类号: G06F8/452 G06F8/4452

    摘要: A method for software pipelining of irregular conditional control loops including pre-processing the loops so they can be safely software pipelined. The pre-processing step ensures that each original instruction in the loop body can be over-executed as many times as necessary. During the pre-processing stage, each instruction in the loop body is processing in turn (N4). If the instruction can be safely speculatively executed, it is left alone (N6). If it could be safely speculatively executed except that it modifies registers that are live out of the loop, then the instruction can be pre-processed using predication or register copying (N7, N8, N9). Otherwise, predication must be applied (N10). Predication is the process of guarding an instruction. When the guard condition is true, the instruction executes as though it were unguarded. When the guard condition is false, the instruction is nullified.

    摘要翻译: 一种用于软件流水线的不规则条件控制回路的方法,包括对循环进行预处理,从而可以安全地软件流水线化。 预处理步骤确保循环体中的每个原始指令可以根据需要多次执行。 在预处理阶段,循环体中的每个指令依次进行处理(N 4)。 如果可以安全地推测执行该指令,则将其留下(N 6)。 如果可以安全推测执行,除了修改生存在循环中的寄存器之外,则可以使用预测或寄存器复制(N 7,N 8,N 9)对指令进行预处理。 否则,必须应用预测(N 10)。 预言是保护指令的过程。 当保护条件为真时,该指令就像未被保护一样执行。 当防护条件为假时,指令无效。

    Methods and apparatus for reducing the size of code with an exposed pipeline by encoding NOP operations as instruction operands
    3.
    发明授权
    Methods and apparatus for reducing the size of code with an exposed pipeline by encoding NOP operations as instruction operands 有权
    用于通过将NOP操作编码为指令操作数来减少具有暴露管线的代码大小的方法和装置

    公开(公告)号:US06799266B1

    公开(公告)日:2004-09-28

    申请号:US09702484

    申请日:2000-10-31

    IPC分类号: G06F9345

    摘要: A method for reducing total code size in a processor having an exposed pipeline may include the steps of determining a latency between a load instruction, and a using instruction and inserting a NOP field into the defining or using instruction. When inserted into the load instruction, the NOP field defines the following latency following the load instruction. When inserted into the using instruction, the NOP field defines the latency preceding the using instruction. In addition, a method for reducing total code size during branching may include the steps of determining a latency following a branch instruction for initiating a branch from a first point to a second point in an instruction stream, and inserting a NOP field into the branch instruction. Further, a method according to this invention may include the steps of locating delayed effect instructions followed by NOPs, such as load or branch instructions, within a code; deleting the NOPs from the code; and inserting a NOP field into the delayed effect instructions. Apparatus according to this invention may include a processor including a code containing a delayed effect instruction, wherein the delayed effect instruction includes a NOP field.

    摘要翻译: 一种用于减少具有暴露的管线的处理器中的总代码大小的方法可以包括以下步骤:确定加载指令和使用指令之间的等待时间,并将NOP字段插入到定义或使用指令中。 当插入加载指令时,NOP字段在加载指令之后定义以下延迟。 当插入使用指令时,NOP字段定义使用指令之前的延迟。 此外,用于减少分支期间的总代码大小的方法可以包括以下步骤:确定在从指令流中的第一点到第二点启动分支的分支指令之后的等待时间,以及将NOP字段插入分支指令 。 此外,根据本发明的方法可以包括以下步骤:在代码内定位延迟效应指令,随后是NOP,诸如加载或分支指令; 从代码中删除NOP; 并将NOP字段插入到延迟效果指令中。 根据本发明的设备可以包括处理器,其包括包含延迟效果指令的代​​码,其中所述延迟效果指令包括NOP字段。

    Method and apparatus for automatically logging compiler options and/or
overriding compiler options

    公开(公告)号:US5960202A

    公开(公告)日:1999-09-28

    申请号:US963600

    申请日:1997-10-31

    IPC分类号: G06F9/44 G06F9/45

    CPC分类号: G06F8/71 G06F8/41

    摘要: The present invention provides a method and apparatus for automatically logging compiler options currently being used in a build environment and/or for replacing or supplementing the current compiler options with new compiler options without necessarily modifying the build environment. In accordance with a first embodiment of the present invention, a wrapper program is stored at a location in memory where the compiler program normally resides. Whenever a compiler user invokes the build process program, a command is generated which is intended to invoke the compiler program. However, instead of the compiler program being invoked by the command, the wrapper program is invoked. The wrapper program comprises a software routine which analyzes the compiler commands to determine which compiler options are designated in the compiler commands. The wrapper program causes a log file of the compiler options contained in the compiler commands to be generated, which is readable by a human and/or by a machine. The wrapper program then causes the compiler program to be invoked and the compiler program then performs its normal functions. The wrapper program may be separate from the compiler program or it may be part of the compiler program. The log file generated by the wrapper program can be modified by a compiler user such that the current compiler options are replaced or supplemented with new compiler options. When the build process program invokes the wrapper program, the wrapper program causes new compiler commands to be generated which comprises the new compiler options, which may be in lieu of or in addition to the compiler options contained in the original compiler commands. The wrapper program then causes the compiler program to be invoked and the compiler program then functions in the normal manner using the options comprised in the new compiler commands. Rather than using the log file to generate new compiler options to be used by the compiler program, an environment variable can be set so that each time a source file is compiled, the compiler option set in the environment variable is used by the compiler program.

    Method for selective solicitation of user assistance in the performance tuning process
    6.
    发明授权
    Method for selective solicitation of user assistance in the performance tuning process 有权
    在性能调整过程中选择性地请求用户帮助的方法

    公开(公告)号:US07237234B2

    公开(公告)日:2007-06-26

    申请号:US10317786

    申请日:2002-12-12

    IPC分类号: G06F9/45

    CPC分类号: G06F8/443

    摘要: A compiler tool is provided to selectively solicit assistance from a programmer in order to improve optimization of code compiled by the compiler. As a program is being compiled, the compiler keeps track of the places where it could do better if it only knew certain information. The user is presented with one or more pieces of advice that each identify a problem that prevented the compiler from making a particular optimization due to not enough information and one or more suggestions as to how to provide additional information to the compiler. This list is generally filtered so that only a subset of missing information that has a high likelihood of leading to better performance is presented. Other missing information is not requested.

    摘要翻译: 提供了一个编译器工具来选择性地从程序员那里寻求帮助,以便改进由编译器编译的代码的优化。 正在编译一个程序,如果编译器只知道某些信息,则会跟踪它可以做得更好的地方。 用户被呈现一个或多个建议,每个建议每个标识一个问题,由于没有足够的信息和关于如何向编译器提供附加信息的一个或多个建议,编译器进行特定的优化。 该列表通常被过滤,以便仅提供导致更好性能的很可能性的缺失信息的一部分。 其他缺少的信息不被请求。

    Speculative data loading using circular addressing or simulated circular addressing
    7.
    发明授权
    Speculative data loading using circular addressing or simulated circular addressing 有权
    使用循环寻址或模拟循环寻址的投机数据加载

    公开(公告)号:US07721054B2

    公开(公告)日:2010-05-18

    申请号:US11334632

    申请日:2006-01-18

    IPC分类号: G06F12/00 G06F13/00 G06F13/28

    CPC分类号: G06F12/0862

    摘要: This invention prevents illegal memory address faults on speculative data loads. Circular addressing of the address pointer limits memory access to a range of addresses including all addresses used by the address pointer and not including any invalid addresses. The invention uses circular addressing hardware, if available on the data processor. If not available, this invention simulates circular addressing. This invention permits loads to be issued earlier than if predication were used and allows already predicated loads to be speculated without the overhead of a compound predicate. This invention can be used on processors without hardware supporting speculation.

    摘要翻译: 本发明可以防止在推测数据负载上的非法存储器地址错误。 地址指针的循环寻址限制存储器访问包括地址指针使用的所有地址的地址范围,并且不包括任何无效地址。 如果在数据处理器上可用,本发明使用循环寻址硬件。 如果不可用,本发明模拟循环寻址。 本发明允许比使用预测更早地发布负载,并且允许在没有复合谓词的开销的情况下推测已经预测的负载。 本发明可以在没有硬件支持推测的处理器上使用。

    Mechanism for pipelining loops with irregular loop control
    8.
    发明授权
    Mechanism for pipelining loops with irregular loop control 有权
    具有不规则环路控制的流水线回路的机制

    公开(公告)号:US07673294B2

    公开(公告)日:2010-03-02

    申请号:US11334604

    申请日:2006-01-18

    IPC分类号: G06F9/45 G06F9/44

    CPC分类号: G06F8/4452

    摘要: This invention modifies an irregular software pipelined loop conditioned upon data in a condition register in a compiler scheduled very long instruction word data processor to prevent over-execution upon loop exit. The method replaces a register modifying instruction with an instruction conditional upon the inverse condition register if possible. The method inserts a conditional register move instruction to a previously unused register within the loop if possible without disturbing the schedule. Then a restoring instruction is added after the loop. Alternatively, both these two functions can be performed by a delayed register move instruction. Instruction insertion is into a previously unused instruction slot of an execute packet. These changes can be performed manually or automatically by the compiler.

    摘要翻译: 本发明根据编译器调度的非常长的指令字数据处理器中的条件寄存器中的数据来修改不规则软件流水线循环,以防止在循环退出时过度执行。 该方法可以用条件为条件寄存器的指令替换寄存器修改指令。 该方法将条件寄存器移动指令插入循环内的先前未使用的寄存器,如果可能,则不会影响调度。 然后在循环之后添加恢复指令。 或者,这两个功能都可以通过延迟寄存器移动指令执行。 指令插入进入执行数据包的先前未使用的指令时隙。 这些更改可以由编译器手动或自动执行。

    Method and apparatus for automatically determining which compiler
options should be used when compiling a computer program
    9.
    发明授权
    Method and apparatus for automatically determining which compiler options should be used when compiling a computer program 失效
    用于自动确定在编译计算机程序时应使用哪些编译器选项的方法和装置

    公开(公告)号:US5966538A

    公开(公告)日:1999-10-12

    申请号:US960527

    申请日:1997-10-31

    IPC分类号: G06F9/45

    CPC分类号: G06F8/42 G06F8/443

    摘要: The present invention provides a method and apparatus for automatically determining which compiler options should be used in compiling a computer program. The present invention utilizes a set of encodable rules in combination with application-specific information obtained from a compiler user, and/or during the compilation process, and/or during run time, and which presents the compiler user with a set of recommended compiler options via a user interface. The user may then select the recommended compiler options to be applied on a program level, i.e., one set for an application, or on a module-per-module level, i.e., with potentially different recommendations for different modules of a program. The present invention utilizes user information obtained from interviewing the compiler user, such as, for example, failure tolerance, compile-time tolerance, application type, etc., compile-time information obtained during one or more compilations of the program, such as, for example, characteristics of loops and data access patterns, and profile information collected at run time, such as, for example, the number of times that a particular call site was invoked while running the particular application, the percentage of time spent in particular routines, etc. The rules then use the information obtained to automatically determine and recommend a set of application-specific compiler options.

    摘要翻译: 本发明提供了一种用于自动确定在编译计算机程序中应当使用哪些编译器选项的方法和装置。 本发明结合从编译器用户获得的应用专用信息和/或在编译过程中和/或在运行时间期间结合使用一组可编码规则,并且向编译器用户呈现一组推荐的编译器选项 通过用户界面。 然后,用户可以选择要在程序级上应用的推荐编译器选项,即针对应用的一个集合,或者在每个模块级别上,即对于程序的不同模块具有潜在的不同的建议。 本发明利用从访问编译器用户获得的用户信息,例如,容错,编译时容忍,应用类型等,在程序的一个或多个编译期间获得的编译时信息, 例如,循环和数据访问模式的特征以及在运行时收集的简档信息,例如在运行特定应用程序时调用特定调用站点的次数,在特定程序中花费的时间百分比 等等。然后,规则使用获取的信息自动确定并推荐一组特定于应用程序的编译器选项。