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公开(公告)号:US20090236714A1
公开(公告)日:2009-09-24
申请号:US12479442
申请日:2009-06-05
申请人: Elsie Agdon Cabahug , Marvin R. Gestole , Margie S. Tumulak-Rios , Lilith U. Montayre , Romel N. Manatad
发明人: Elsie Agdon Cabahug , Marvin R. Gestole , Margie S. Tumulak-Rios , Lilith U. Montayre , Romel N. Manatad
IPC分类号: H01L23/495
CPC分类号: H01L23/49562 , H01L2224/16 , H01L2224/16245 , H01L2224/73253 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/01322 , H01L2924/1305 , H01L2924/13091 , H01L2924/00
摘要: A method for making a flip chip in a leaded molded package is disclosed. In some embodiments, the method includes using a leadframe structure including a die attach region and leads. The die attach region includes depressions proximate the inner portions of the leads, and an aperture in the die attach region. A semiconductor die is mounted to the die attach region. A molding material passes through the aperture and covers the first surface of the semiconductor die and the die attach region.
摘要翻译: 公开了一种用于制造引线模制封装中的倒装芯片的方法。 在一些实施例中,该方法包括使用包括管芯附着区域和引线的引线框架结构。 管芯附着区域包括靠近引线的内部部分的凹陷和管芯附着区域中的孔。 半导体管芯安装到管芯附着区域。 成型材料通过孔并覆盖半导体管芯的第一表面和管芯附着区域。
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公开(公告)号:US07560311B2
公开(公告)日:2009-07-14
申请号:US11446342
申请日:2006-06-01
申请人: Elsie Agdon Cabahug , Marvin Rosalejos Gestole , Margie Sebial Tumulak-Rios , Lilith U. Montayre , Romel N. Manatad
发明人: Elsie Agdon Cabahug , Marvin Rosalejos Gestole , Margie Sebial Tumulak-Rios , Lilith U. Montayre , Romel N. Manatad
IPC分类号: H01L21/50 , H01L23/495
CPC分类号: H01L23/49562 , H01L2224/16 , H01L2224/16245 , H01L2224/73253 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/01322 , H01L2924/1305 , H01L2924/13091 , H01L2924/00
摘要: A method for making a flip chip in a leaded molded package is disclosed. In some embodiments, the method includes using a leadframe structure including a die attach region and leads. The die attach region includes depressions proximate the inner portions of the leads, and an aperture in the die attach region. A semiconductor die is mounted to the die attach region. A molding material passes through the aperture and covers the first surface of the semiconductor die and the die attach region.
摘要翻译: 公开了一种用于制造引线模制封装中的倒装芯片的方法。 在一些实施例中,该方法包括使用包括管芯附着区域和引线的引线框架结构。 管芯附着区域包括靠近引线的内部部分的凹陷和管芯附着区域中的孔。 半导体管芯安装到管芯附着区域。 成型材料通过孔并覆盖半导体管芯的第一表面和管芯附着区域。
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公开(公告)号:US07906837B2
公开(公告)日:2011-03-15
申请号:US12479442
申请日:2009-06-05
申请人: Elsie Agdon Cabahug , Marvin Rosalejos Gestole , Margie Sebial Tumulak-Rios , Lilith U. Montayre , Romel N. Manatad
发明人: Elsie Agdon Cabahug , Marvin Rosalejos Gestole , Margie Sebial Tumulak-Rios , Lilith U. Montayre , Romel N. Manatad
IPC分类号: H01L23/495 , H01L21/50
CPC分类号: H01L23/49562 , H01L2224/16 , H01L2224/16245 , H01L2224/73253 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/01322 , H01L2924/1305 , H01L2924/13091 , H01L2924/00
摘要: A method for making a flip chip in a leaded molded package is disclosed. In some embodiments, the method includes using a leadframe structure including a die attach region and leads. The die attach region includes depressions proximate the inner portions of the leads, and an aperture in the die attach region. A semiconductor die is mounted to the die attach region. A molding material passes through the aperture and covers the first surface of the semiconductor die and the die attach region.
摘要翻译: 公开了一种用于制造引线模制封装中的倒装芯片的方法。 在一些实施例中,该方法包括使用包括管芯附着区域和引线的引线框架结构。 管芯附着区域包括靠近引线的内部部分的凹陷和管芯附着区域中的孔。 半导体管芯安装到管芯附着区域。 成型材料通过孔并覆盖半导体管芯的第一表面和管芯附着区域。
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公开(公告)号:US07122884B2
公开(公告)日:2006-10-17
申请号:US10413668
申请日:2003-04-14
申请人: Elsie Agdon Cabahug , Marvin Rosalejos Gestole , Margie Sebial Tumulak-Rios , Lilith U. Montayre , Romel N. Manatad
发明人: Elsie Agdon Cabahug , Marvin Rosalejos Gestole , Margie Sebial Tumulak-Rios , Lilith U. Montayre , Romel N. Manatad
IPC分类号: H01L23/495
CPC分类号: H01L23/49562 , H01L2224/16 , H01L2224/16245 , H01L2224/73253 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/01322 , H01L2924/1305 , H01L2924/13091 , H01L2924/00
摘要: A method for making a flip chip in a leaded molded package is disclosed. In some embodiments, the method includes using a leadframe structure including a die attach region and leads. The die attach region includes depressions proximate the inner portions of the leads, and an aperture in the die attach region. A semiconductor die is mounted to the die attach region. A molding material passes through the aperture and covers the first surface of the semiconductor die and the die attach region.
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