摘要:
A CMUT on CMOS imaging chip is disclosed. The imaging chip can use direct connection, CMOS architecture to minimize external connections and minimize chip cross-section. The CMOS architecture can enable substantially the entire chip area to be utilized for element placement. The chip can utilize arbitrarily selected transmit (Tx) and receive (Rx) element arrays to improve image quality, while reducing sampling time. The chip can comprise a plurality of dummy elements dispersed throughout the Tx and Rx elements to reduce cross-talk. The chip can utilize batch firing techniques to increase transmit power using sparse Tx arrays. The chip can comprise hexagonal Tx and or Rx subarrays for improved image quality with reduce sample sizes. The chip can utilize electrode geometry, bias voltage, and polarity to create phased and amplitude apodized arrays of Tx and Rx elements.
摘要:
A CMUT on CMOS imaging chip is disclosed. The imaging chip can use direct connection, CMOS architecture to minimize both internal and external connection complexity. Intelligent power management can enable the chip to be used for various imaging applications with strict power constraints, including forward-looking intra-vascular ultrasound imaging. The chip can use digital logic to control transmit and receive events to minimize power consumption and maximize image resolution. The chip can be integrated into a probe, or catheter, and requires minimal external connections. The chip can comprise integrated temperature control to prevent overheating.
摘要:
A CMUT on CMOS imaging chip is disclosed. The imaging chip can use direct connection, CMOS architecture to minimize both internal and external connection complexity. Intelligent power management can enable the chip to be used for various imaging applications with strict power constraints, including forward-looking intra-vascular ultrasound imaging. The chip can use digital logic to control transmit and receive events to minimize power consumption and maximize image resolution. The chip can be integrated into a probe, or catheter, and requires minimal external connections. The chip can comprise integrated temperature control to prevent overheating.
摘要:
A CMUT on CMOS imaging chip is disclosed. The imaging chip can use direct connection, CMOS architecture to minimize external connections and minimize chip cross-section. The CMOS architecture can enable substantially the entire chip area to be utilized for element placement. The chip can utilize arbitrarily selected transmit (Tx) and receive (Rx) element arrays to improve image quality, while reducing sampling time. The chip can comprise a plurality of dummy elements dispersed throughout the Tx and Rx elements to reduce cross-talk. The chip can utilize batch firing techniques to increase transmit power using sparse Tx arrays. The chip can comprise hexagonal Tx and or Rx subarrays for improved image quality with reduce sample sizes. The chip can utilize electrode geometry, bias voltage, and polarity to create phased and amplitude apodized arrays of Tx and Rx elements.
摘要:
An invention for coherent array image formation and restoration is taught. The invention is applicable for both 2D and 3D imaging using either 1D or 2D arrays, respectively. A transducer array is subdivided into subarrays, each subarray having a number of adjacent array elements. All elements of each subarray transmit and receive in parallel. The signals received from each subarray are delayed and summed to form scan lines, or beams. The low-beam-rate beams formed from each subarray are upsampled and interpolated prior to forming high-beam-rate images. Depending on the subarray geometry, a subarray-dependent restoration filter is also applied to the subarray beams. The restored beams from each subarray are combined to form the final high-beam-rate image. The invention significantly reduces the front-end hardware complexity compared to conventional methods such as full phased array imaging with comparable image quality.
摘要:
An invention for coherent array image formation and restoration is taught. The invention is applicable for both 2D and 3D imaging using either ID or 2D arrays, respectively. A transducer array is subdivided into subarrays, each subarray having a number of adjacent array elements. All elements of each subarray transmit and receive in parallel. The signals received from each subarray are delayed and summed to form scan lines, or beams. The low-beam-rate beams formed from each subarray are upsampled and interpolated prior to forming high-beam-rate images. Depending on the subarray geometry, a subarray-dependent restoration filter is also applied to the subarray beams. The restored beams from each subarray are combined to form the final high-beam-rate image. The invention significantly reduces the front-end hardware complexity compared to conventional methods such as full phased array imaging with comparable image quality.
摘要:
An invention for coherent array image formation and restoration is taught. The invention is applicable for both 2D and 3D imaging using either 1D or 2D arrays, respectively. A transducer array is subdivided into subarrays, each subarray having a number of adjacent array elements. All elements of each subarray transmit and receive in parallel. The signals received from each subarray are delayed and summed to form scan lines, or beams. The low-beam-rate beams formed from each subarray are upsampled and interpolated prior to forming high-beam-rate images. Depending on the subarray geometry, a subarray-dependent restoration filter is also applied to the subarray beams. The restored beams from each subarray are combined to form the final high-beam-rate image. The invention significantly reduces the front-end hardware complexity compared to conventional methods such as full phased array imaging with comparable image quality.