公开(公告)号：US10826471B2

公开(公告)日：2020-11-03

申请号：US16460140

申请日：2019-07-02

申请人： FAIRCHILD SEMICONDUCTOR CORPORATION

发明人： Hua Zhu ,  Kaiwei Yao

IPC分类号： H03K5/003 ,  H03K4/50

摘要： A switch mode power supply includes an error amplifier, an oscillator, a pulse width modulation logic circuit, and an output stage. The oscillator includes a current generator that receives a clock signal and provides a current proportional to a frequency of the clock signal, a current mirror having an input coupled to the output of the current generator, and a first capacitor having a first terminal coupled to an output of the current mirror and providing a ramp signal, and a second terminal coupled to power supply voltage terminal. The pulse width modulation logic circuit compares the output of the error amplifier with the ramp signal, and generates a high- and low-side drive signals respectively to first and second outputs in response to the comparing. The output stage is responsive to the high- and low-side drive signals for alternatively coupling a switch terminal between an input voltage terminal and ground.

公开(公告)号：US10389337B2

公开(公告)日：2019-08-20

申请号：US15584729

申请日：2017-05-02

申请人： FAIRCHILD SEMICONDUCTOR CORPORATION

发明人： Hua Zhu ,  Kaiwei Yao

IPC分类号： H03K4/50 ,  H03K5/003

摘要： A ramp generator includes a current generator, a current mirror, and a first capacitor. The current generator has an input for receiving a clock signal, and an output for providing a current proportional to a frequency of the clock signal using a first transistor having first and second current electrodes and a control electrode, an amplifier that establishes a reference voltage on the second current electrode of the first transistor, and a variable resistor coupled between the second current electrode of the second transistor and ground whose resistance is set according to the frequency of the clock signal. The current mirror has an input coupled to the first terminal of the first transistor, and a second terminal. The first capacitor has a first terminal coupled to the output of the current mirror and providing a ramp signal, and a second terminal coupled to the first power supply voltage terminal.