公开(公告)号：US07116130B2

公开(公告)日：2006-10-03

申请号：US10742663

申请日：2003-12-18

Applicant: Fang-Bin Liu ,  Wu-Han Yang

Inventor： Fang-Bin Liu ,  Wu-Han Yang

IPC: G06F7/38 ,  G06F17/50 ,  H03K19/173 ,  H03K19/177 ,  H03K17/693

CPC classification number: G06F17/5054

Abstract: A method for effectively re-downloading data to a Field Programmable Gate Array (FPGA). The method uses two Complex Programmable Logic Devices (CPLDs) to implement control functions of Write-to-Non-Volatile Random Access Memory (NVRAM) and Write-to-FPGA respectively, in conjunction with a set of connectors with a detection circuit, such that according to a detection state output by the detection circuit to one CPLD implemented with Write-to-FPGA control function, a write-to-NVRAM operation for data is determined if the detection state is logic low and conversely data is written from the NVRAM to the FPGA.

Abstract translation: 一种有效地将数据重新下载到现场可编程门阵列（FPGA）的方法。 该方法使用两个复杂可编程逻辑器件（CPLD）分别实现写入非易失性随机存取存储器（NVRAM）和写入到FPGA的控制功能，以及一组具有检测电路的连接器，如 根据由检测电路输出的检测状态，通过写到FPGA控制功能实现的一个CPLD，如果检测状态为逻辑低，并且相反地从NVRAM写入数据，则确定数据的写NVR操作 到FPGA。