公开(公告)号：US08296525B1

公开(公告)日：2012-10-23

申请号：US12537857

申请日：2009-08-07

申请人： Frank O'Bleness ,  Sujat Jamil ,  David E. Miner ,  Tom Hameenanttila ,  Jeffrey Kehl ,  Richard Bryant ,  Kim Schuttenberg

发明人： Frank O'Bleness ,  Sujat Jamil ,  David E. Miner ,  Tom Hameenanttila ,  Jeffrey Kehl ,  Richard Bryant ,  Kim Schuttenberg

IPC分类号： G06F12/00

CPC分类号： G06F12/0831

摘要： A system and method of tracking multiple non-identification tagged requests in a system with multiple responders using one or more tracking queues. In some embodiments, the system and method may be implemented in a snoop filter covering multiple caches. In some embodiments, a data-less bus query may be used to update the status of a requested line.

摘要翻译： 在具有使用一个或多个跟踪队列的多个响应者的系统中跟踪多个非识别标记请求的系统和方法。 在一些实施例中，系统和方法可以在覆盖多个高速缓存的窥探过滤器中实现。 在一些实施例中，可以使用无数据总线查询来更新所请求行的状态。

公开(公告)号：US09116742B1

公开(公告)日：2015-08-25

申请号：US13550755

申请日：2012-07-17

申请人： Kim Schuttenberg ,  Sujat Jamil ,  R. Frank O'Bleness

发明人： Kim Schuttenberg ,  Sujat Jamil ,  R. Frank O'Bleness

IPC分类号： G06F15/00 ,  G06F9/48

CPC分类号： G06F9/4812 ,  G06F9/3842 ,  G06F9/3861

摘要： Systems, methods, and other embodiments associated with reducing interrupt latency are described. According to one embodiment, an apparatus includes a buffer storing instructions awaiting execution by an execution device. The apparatus also includes an interrupt logic that, in response to receiving an interrupt, classifies instructions as either safe or unsafe. An unsafe instruction will cause the instructions to execute in a manner inconsistent with an instruction set architecture. The interrupt logic also establishes an interrupt boundary between safe and unsafe instructions, and causes the interrupt to be processed at the interrupt boundary such that the interrupt is processed before processing of the unsafe instructions.

摘要翻译： 描述了与减少中断延迟相关联的系统，方法和其他实施例。 根据一个实施例，一种装置包括存储执行装置等待执行的指令的缓冲器。 该装置还包括中断逻辑，响应于接收中断，将指令分类为安全或不安全。 不安全的指令将导致指令以不符合指令集架构的方式执行。 中断逻辑还建立安全和不安全指令之间的中断边界，并使中断在中断边界处理，以便在处理不安全指令之前对中断进行处理。

公开(公告)号：US08607090B2

公开(公告)日：2013-12-10

申请号：US13036287

申请日：2011-02-28

申请人： Kim Schuttenberg ,  Franco Ricci

发明人： Kim Schuttenberg ,  Franco Ricci

IPC分类号： G06F1/04

CPC分类号： G06F1/10

摘要： Systems, methods, and other embodiments associated with selective shorting are described. According to one embodiment, an apparatus includes a selective shorting device connected between clock branches. The selective shorting device is configured to selectively electrically connect the clock branches to one another and to selectively electrically disconnect the clock branches from one another. The apparatus also includes a selective shorting control mechanism that controls the selective shorting device to electrically connect the clock branches during a controlling portion of a clock signal. The selective shorting control mechanism is configured to electrically disconnect the clock branches in the absence of the controlling portion.

摘要翻译： 描述了与选择性短路相关联的系统，方法和其他实施例。 根据一个实施例，一种装置包括连接在时钟分支之间的选择性短路装置。 选择性短路装置被配置为选择性地将时钟分支电连接到彼此并且选择性地将时钟分支彼此电断开。 该装置还包括选择性短路控制机构，其控制选通短路装置在时钟信号的控制部分期间电连接时钟分支。 选择性短路控制机构被配置为在没有控制部分的情况下电时断开时钟分支。