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公开(公告)号：US20170124354A1
公开(公告)日：2017-05-04
申请号：US14930194
申请日：2015-11-02
CPC分类号： G06F21/70 , G06F21/6218 , G09C1/00 , H04L2209/26
摘要： An integrated circuit includes a security module with multiple stages arranged in a pipeline, with each stage executing a different operation for accessing stored lifecycle (LC) information. For each portion of LC being accessed, each stage performs N iterations of its corresponding operation, whereby N is an integer greater than two, and crosschecks the results of successive iterations to ensure that the results of the operation are consistent. In addition, the stages of the security module are overlapping, such that different stages can perform different iterations concurrently. These concurrent operations at different stages are organized such that they may also be crosschecked and thereby confirm “offset” results between the stages.
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公开(公告)号：US10289871B2
公开(公告)日：2019-05-14
申请号：US14930194
申请日：2015-11-02
摘要： An integrated circuit includes a security module with multiple stages arranged in a pipeline, with each stage executing a different operation for accessing stored lifecycle (LC) information. For each portion of LC being accessed, each stage performs N iterations of its corresponding operation, whereby N is an integer greater than two, and crosschecks the results of successive iterations to ensure that the results of the operation are consistent. In addition, the stages of the security module are overlapping, such that different stages can perform different iterations concurrently. These concurrent operations at different stages are organized such that they may also be crosschecked and thereby confirm “offset” results between the stages.
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公开(公告)号：US09619647B2
公开(公告)日：2017-04-11
申请号：US14706128
申请日：2015-05-07
CPC分类号： G06F21/44 , G06F21/57 , G06F21/75 , G06F2221/2143 , G06K19/073 , G09C1/00
摘要： A method provides access to an integrated circuit which may comprise a storage containing an unalterable first security key and a memory containing a second security key. The method may comprise: checking the second security key by comparing the first security key and the second security key, if the second security key is valid, providing access to the integrated circuit, optionally depending on the validity of an access key, and if the second security key is invalid, enabling erasing the memory, and storing in the memory a new second security key which corresponds to the first security key. Erasing the memory may be followed by checking the erasing for completeness.
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