公开(公告)号：US20150040080A1

公开(公告)日：2015-02-05

申请号：US13955342

申请日：2013-07-31

Applicant: GLOBALFOUNDRIES, Inc.

Inventor： Ayman Hamouda ,  Mohab Anis

IPC: G06F17/50

CPC classification number: G06F17/5081 ,  G06F17/5068

Abstract: Methods for modifying a layout design of an integrated circuit using model-based retargeting are provided. In one embodiment, a method for modifying an integrated circuit layout design includes providing an initial integrated circuit layout design, correcting the initial layout design for etch-induced lithography errors to generate an etch-corrected layout design, and fragmenting the etch-corrected layout design to generate a fragmented layout design comprising a plurality of fragments. The method further includes performing a bridging condition simulation and a pinching condition simulation on the fragmented layout design and calculating a required movement for at least one fragment of the fragmented layout design based on the bridging condition simulation and the pinching condition simulation. Still further, the method includes modifying the fragmented layout design by moving the at least one fragment in accordance with the required movement to generate a modified layout design and performing optical proximity correction on the modified layout design.

Abstract translation: 提供了使用基于模型的重定向来修改集成电路的布局设计的方法。 在一个实施例中，用于修改集成电路布局设计的方法包括提供初始集成电路布局设计，校正蚀刻诱导的光刻误差的初始布局设计以产生经蚀刻校正的布局设计，以及将经蚀刻校正的布局设计 以产生包括多个片段的分段布局设计。 该方法还包括在分段布局设计上执行桥接条件模拟和压缩条件模拟，并且基于桥接条件模拟和压缩条件模拟来计算分段布局设计的至少一个片段的所需移动。 此外，该方法包括通过根据所需的移动来移动至少一个片段来修改分段布局设计，以生成修改的布局设计并对修改的布局设计执行光学邻近校正。

公开(公告)号：US08997027B2

公开(公告)日：2015-03-31

申请号：US13955342

申请日：2013-07-31

Applicant: GLOBALFOUNDRIES, Inc.

Inventor： Ayman Hamouda ,  Mohab Anis

IPC: G06F17/50

CPC classification number: G06F17/5081 ,  G06F17/5068

Abstract: Methods for modifying a layout design of an integrated circuit using model-based retargeting are provided. In one embodiment, a method for modifying an integrated circuit layout design includes providing an initial integrated circuit layout design, correcting the initial layout design for etch-induced lithography errors to generate an etch-corrected layout design, and fragmenting the etch-corrected layout design to generate a fragmented layout design comprising a plurality of fragments. The method further includes performing a bridging condition simulation and a pinching condition simulation on the fragmented layout design and calculating a required movement for at least one fragment of the fragmented layout design based on the bridging condition simulation and the pinching condition simulation. Still further, the method includes modifying the fragmented layout design by moving the at least one fragment in accordance with the required movement to generate a modified layout design and performing optical proximity correction on the modified layout design.

Abstract translation: 提供了使用基于模型的重定向来修改集成电路的布局设计的方法。 在一个实施例中，用于修改集成电路布局设计的方法包括提供初始集成电路布局设计，校正蚀刻诱导的光刻误差的初始布局设计以产生经蚀刻校正的布局设计，以及将经蚀刻校正的布局设计 以产生包括多个片段的分段布局设计。 该方法还包括在分段布局设计上执行桥接条件模拟和压缩条件模拟，并且基于桥接条件模拟和压缩条件模拟来计算分段布局设计的至少一个片段的所需移动。 此外，该方法包括通过根据所需的移动来移动至少一个片段来修改分段布局设计，以生成修改的布局设计并对修改的布局设计执行光学邻近校正。