公开(公告)号：US20200303247A1

公开(公告)日：2020-09-24

申请号：US16355853

申请日：2019-03-18

Applicant: GLOBALFOUNDRIES INC.

Inventor： JIEHUI SHU ,  HUI ZANG ,  SCOTT HOWARD BEASOR ,  DALI SHAO

IPC: H01L21/768 ,  H01L29/417

Abstract: The present disclosure generally relates to semiconductor device fabrication and integrated circuits. More particularly, the present disclosure relates to methods of forming a protective liner in transistor devices for protecting one or more gate spacers having a low-K dielectric material. The present disclosure further provides a semiconductor structure including a gate structure having a gate spacer, a trench having upper and lower sidewall portions adjacent to the gate spacer, the trench having a conductive structure over a device element and an adjoining insulative structure over an electrical isolation region, a dielectric liner disposed on the lower sidewall portion of the trench, and a protective liner disposed on the upper sidewall portion of the trench and within the insulative structure.