公开(公告)号：US10691862B2

公开(公告)日：2020-06-23

申请号：US15644288

申请日：2017-07-07

Applicant: GLOBALFOUNDRIES INC.

Inventor： Neha Nayyar ,  Daniel J. Dechene ,  David C. Pritchard ,  George J. Kluth

IPC: G06F30/394 ,  H01L23/522 ,  H01L21/8234

Abstract: The present disclosure relates to methodologies for designing semiconductor structures, and, more particularly, creating a methodology to connect contacts of semiconductor elements to a metal line using marker tabs to reserve space for future connections between the contacts and the metal line, and then reassigning the marker tabs to connections between the contacts and the metal line on different levels of a metal stack formed over the semiconductor elements.