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公开(公告)号：US10176857B1
公开(公告)日：2019-01-08
申请号：US15630466
申请日：2017-06-22
Applicant: GLOBALFOUNDRIES INC.
IPC: G11C8/16 , H03K19/177
Abstract: The present disclosure relates to a structure which includes a dual write bit switch device which includes a plurality of bit switch devices positioned at different positions of a memory cell array, and which is configured to enable write operations at a specified number of cells per bit line of the memory cell array.
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