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公开(公告)号:US10340177B2
公开(公告)日:2019-07-02
申请号:US15048493
申请日:2016-02-19
Applicant: GLOBALFOUNDRIES Inc.
IPC: H01L21/02 , H01L21/311 , H01L21/768 , H01L21/00 , H01L23/522 , H01L23/532
Abstract: Intermediate semiconductor devices and methods of reducing damage during back end of the line (BEOL) metallization and metal one (M1) layer integration scheme are provided. One method includes, for instance: obtaining a wafer having at least one contact region; depositing on the wafer a thin film stack having at least one layer of amorphous silicon (a-Si); performing lithography to pattern at least one opening; performing lithography to pattern at least one via opening and at least one trench opening; and removing the at least one a-Si layer. One intermediate semiconductor device includes, for instance: a wafer having at least one contact region; at least one first dielectric layer on the device; at least one second dielectric layer on the at least one first dielectric layer; and at least one a-Si layer on the at least one second dielectric layer.