公开(公告)号：US09548136B2

公开(公告)日：2017-01-17

申请号：US14664959

申请日：2015-03-23

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Vivek Joshi ,  Sriram Balasubramanian ,  Chad Weintraub ,  Yoann Mamy Randriamihaja ,  William McMahon

IPC: G11C29/00 ,  G11C29/04 ,  G11C11/419

CPC classification number: G11C29/04 ,  G11C11/412 ,  G11C11/419 ,  G11C29/56008

Abstract: A method and an apparatus for identifying non-intrinsic defect bits from a population of failing bits for failure analysis to characterize the extrinsic failure mechanisms is provided. Embodiments include performing a failure mode test on a bank of a memory array at different low VDD; determining optimal bank size to observe plateaus of fail counts; determining fail counts of the bank at each different low VDD; determining a plateau of the fail counts; determining whether the plateau represents extrinsic bits of the bank; and submitting the extrinsic bits for root cause analysis.

Abstract translation: 提供了一种用于从用于故障分析的故障位群体中识别非本征缺陷位以表征外在故障机制的方法和装置。 实施例包括在不同的低VDD下对存储器阵列进行故障模式测试; 确定最佳银行规模以观察失败计数的平稳度; 在每个不同的低VDD处确定存储体的故障计数; 确定失败计数的高原; 确定平台是否代表银行的外在位; 并提交根本原因分析的外在位。