公开(公告)号：US10373942B2

公开(公告)日：2019-08-06

申请号：US15829459

申请日：2017-12-01

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Ram Asra ,  Mohit Bajaj ,  Edward Nowak ,  Kota V. R. M. Murali

IPC: H01L29/66 ,  H01L27/02 ,  H01L29/78 ,  H01L27/11 ,  H01L29/06 ,  H01L27/092 ,  H01L27/12 ,  H01L21/8238 ,  H01L29/423

Abstract: A method of forming a SRAM semiconductor device with reduced area layout and a resulting device are provided. Embodiments include forming a first field effect transistor (FET) over a substrate; forming an insulating material over the first FET; forming a second FET over the insulating material; and patterning the first FET, insulating material and second FET to form fins over the substrate.