公开(公告)号：US20180342661A1

公开(公告)日：2018-11-29

申请号：US15605289

申请日：2017-05-25

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Philipp Steinmann ,  Puneet H. Suvarna

IPC: H01L35/32 ,  H01L35/22 ,  H01L35/34

Abstract: Structures that include semiconductor fins and methods for forming a structure that includes semiconductor fins. A first fin comprised of n-type semiconductor material and a second fin comprised of p-type semiconductor material are formed. A conductive strap is formed that couples an end of the first fin with an end of the second fin.

公开(公告)号：US20190319180A1

公开(公告)日：2019-10-17

申请号：US16448544

申请日：2019-06-21

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Philipp Steinmann ,  Puneet H. Suvarna

IPC: H01L35/32 ,  H01L35/22 ,  H01L35/34

Abstract: Structures that include semiconductor fins and methods for forming a structure that includes semiconductor fins. A first fin comprised of n-type semiconductor material and a second fin comprised of p-type semiconductor material are formed. A conductive strap is formed that couples an end of the first fin with an end of the second fin

公开(公告)号：US10049917B2

公开(公告)日：2018-08-14

申请号：US15269023

申请日：2016-09-19

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Philipp Steinmann ,  Peter Javorka

IPC: H01L21/762 ,  H01L27/12 ,  H01L21/3115 ,  H01L21/02 ,  H01L29/786

Abstract: Methods of locally changing the BOX layer of a MOSFET device to a high-k layer to provide different Vts with one backside voltage and the resulting device are provided. Embodiments include providing a Si substrate having a BOX layer formed over the substrate and a SOI layer formed over the BOX layer; implanting a high current of dopants into at least one portion of the BOX layer; performing a high-temperature anneal of the BOX layer; forming first and second fully depleted silicon-on-insulator (FDSOI) transistors on the SOI layer, the first FDSOI transistors formed above either the BOX layer or the at least one portion of the BOX layer and the second FDSOI transistors formed above the at least one portion of the BOX layer; and applying a single voltage across a backside of the Si substrate.