公开(公告)号：US09984936B1

公开(公告)日：2018-05-29

申请号：US15651621

申请日：2017-07-17

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Ruilong Xie ,  Siva P. Adusumilli ,  Kangguo Cheng ,  Pietro Montanini ,  Robinhsinku Chao

IPC: H01L21/8234 ,  H01L29/423 ,  H01L29/66

CPC classification number: H01L21/823481 ,  H01L29/42392 ,  H01L29/66545 ,  H01L29/775 ,  H01L29/785

Abstract: A method includes forming a sacrificial gate and a stack of materials above a semiconductor substrate, forming a trench in each of the source/drain areas of the device, wherein each trench extends into the semiconductor substrate, forming an empty space under the sacrificial gate structure, the empty space being vertically positioned between the stack of materials and the semiconductor substrate, wherein the empty space is in communication with the trenches, performing a conformal deposition process so as to deposit a conformal layer of a device isolation material adjacent at least the sacrificial gate while at least partially filling the empty space and substantially filling the trenches, and performing a recess etching process to remove at least portions of the conformal layer positioned adjacent the sacrificial gate, thereby defining a recessed upper surface of the device isolation material.