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公开(公告)号：US12088302B2
公开(公告)日：2024-09-10
申请号：US18364848
申请日：2023-08-03
申请人： Quantum Machines
发明人： Yonatan Cohen , Nissim Ofek , Itamar Sivan
摘要： A controller comprises a pulse generation circuit, output management circuitry, and a plurality of outputs configured to connect the controller to a plurality of controlled elements. The pulse generation circuit is configured to generate quantum control pulses. For each control pulse of a plurality of control pulses generated by the pulse generation circuit, the output management circuitry is configured to determine to which of the plurality of outputs to route the control pulse such that a first of the plurality of control pulses is routed to a first of the plurality of controlled elements and a second of the plurality of control pulses is routed to a second of the plurality of control elements.
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公开(公告)号：US12056084B2
公开(公告)日：2024-08-06
申请号：US17447732
申请日：2021-09-15
申请人： The Boeing Company
发明人： Joshua R. Byrne , Ronald James Koontz , Sean M. Ramey , Jason Ellis Sherrill , Hyunsuk Shin , David Carl Matthews
IPC分类号： G06F11/00 , G06F15/163 , G06F15/82
CPC分类号： G06F15/82 , G06F15/163 , G06F15/17325 , G06F15/173
摘要： A method for synchronizing messages between processors is provided. The method comprising receiving, by a first external device, inbound messages for applications running redundantly in high integrity mode on two or more multi-core processors. The inbound messages are synchronously copied to the multi-core processors. The multi-core processors send outbound messages to respective alignment queues in the first external device or a second external device, wherein the outbound messages contain calculation results from the inbound messages. The first or second external device compares the alignment queues. Matched outbound messages in the alignment queues are sent to a network or data bus. Any unmatched outbound messages in the alignment queues are discarded.
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公开(公告)号：US20230394774A1
公开(公告)日：2023-12-07
申请号：US18450317
申请日：2023-08-15
IPC分类号： G06T19/00 , G09G5/377 , G02B27/01 , G06F3/01 , H04W12/04 , H04W12/06 , H04W12/08 , H04W12/088 , G06F15/82 , G06T1/20 , H04L67/10 , G06F3/038 , G06F3/04842 , H04L9/40
CPC分类号： G06T19/006 , G09G5/377 , G02B27/017 , G06F3/017 , G06F3/012 , G06F3/011 , H04W12/04 , H04W12/06 , H04W12/08 , H04W12/068 , H04W12/088 , G06F15/82 , G06T1/20 , H04L67/10 , G06F3/038 , G06F3/04842 , H04L63/0218 , G02B2027/0138 , G02B2027/014 , G02B2027/0187 , H04L63/0227 , G06F3/147
摘要： A system for providing an augmented reality interface comprising a head mounted display having a wireless data interface, a camera and a display, the head mounted display configured to receive user interface data and to generate a user interface using the display and to receive image data from the camera and to transmit the image data over the wireless data interface to a wireless network. A wireless device configured to generate the wireless network, to transmit the user interface data to the head mounted display, to receive the image data from the head mounted display and to generate modified user interface data as a function of the image data.
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公开(公告)号：US11822408B2
公开(公告)日：2023-11-21
申请号：US17717188
申请日：2022-04-11
申请人： FUJITSU LIMITED
发明人： Akira Hirai
摘要： A recording medium stores a program for causing a computer to execute processing including: acquiring a first process execution time and energy consumption of a first processor core in the execution time when a process executed by the first processor core is switched from a first process to a second process; specifying one or more processes of a first process group to which the first process belongs, from among process groups each of which is a group of processes and calculating an index that indicates the energy consumption per unit time involved in execution of the first process group based on the execution time and the energy consumption acquired for the specified one or more processes; and controlling an operation of a processor core to which the process is allocated according to comparison between the index calculated for the first process group with a threshold.
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公开(公告)号：US20230281158A1
公开(公告)日：2023-09-07
申请号：US17653798
申请日：2022-03-07
摘要： Logical processor distribution across physical processors is provided. A set of logical processors of a number of logical processors defined for a particular logical partition of a plurality of active logical partitions is assigned to a physical processor chip having a greatest logical processor entitlement for the particular logical partition until no more logical processors can be assigned to that physical processor chip based on a logical processor entitlement of that physical processor chip being exhausted. Remaining logical processors of the number of logical processors defined for the particular logical partition are assigned to other physical processor chips of a plurality of physical processor chips assigned to the particular logical partition until all of the remaining logical processors have been assigned to a physical processor chip.
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公开(公告)号：US11734596B2
公开(公告)日：2023-08-22
申请号：US17096313
申请日：2020-11-12
发明人： Vadym Kliuchnikov , Eddie Schoute , Alexander Vaschillo , Dmitry Vasilevsky , Michael Beverland
IPC分类号： G06N10/00 , G06N10/60 , G06N10/70 , G06F15/82 , G06F30/327
CPC分类号： G06N10/00 , G06F15/82 , G06F30/327 , G06N10/60 , G06N10/70
摘要： A method for performing long-range multi-qubit measurements in a quantum circuit utilizes a graph that maps qubits of the quantum circuit to nodes that are connected to one another by edges. The method provides for identifying sets of the nodes on the graph corresponding to sets of qubits targeted by multi-qubit operations in a quantum algorithm and for defining a group of edge-disjoint paths connecting the nodes of each set. The group of edge-disjoint paths is defined such that no two of the paths in the group share an edge. The method further provides for performing a set of operations to entangle the qubits corresponding to the to the identified set of nodes that are included in each path in the group and for performing the set of multi-qubit operations on the entangled sets of the qubits.
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公开(公告)号：US20190130942A1
公开(公告)日：2019-05-02
申请号：US15802365
申请日：2017-11-02
申请人： KANDOU LABS, S.A.
发明人： Ali Hormati , Armin Tajalli
CPC分类号： G11B20/10398 , G06F13/4063 , G06F15/82 , H03L7/085 , H03L7/099 , H04L7/0331
摘要： Methods and systems are described for obtaining, at a phase-error aggregator, a plurality of data-derived phase-error signals for two or more data lanes of a multi-wire bus, each data-derived phase-error signal generated using at least (i) a phase of one or more phases of a local oscillator signal and (ii) a corresponding data signal associated with one of the two or more data lanes, generating a composite phase-error signal representing a combination of the two or more obtained data-derived phase-error signals, receiving the composite phase-error signal at a loop filter responsively generating an oscillator control signal, and receiving the oscillator control signal at a local oscillator and responsively adjusting a timing of the local oscillator to adjust the one or more phases of the local oscillator signal.
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8.发明申请公开(公告)号：US20180373996A1
公开(公告)日：2018-12-27
申请号：US16057500
申请日：2018-08-07
申请人： D-Wave Systems Inc.
发明人： Mohammad H.S. Amin , Andrew J. Berkley , Richard G. Harris , Trevor Michael Lanting , Anatoly Yu Smirnov
摘要： Systems and methods for employing macroscopic resonant tunneling operations in quantum processors are described. New modes of use for quantum processor architectures employ probe qubits to determine energy eigenvalues of a problem Hamiltonian through macroscopic resonant tunneling operations. A dedicated probe qubit design that may be added to quantum processor architectures is also described. The dedicated probe qubit enables improved performance of macroscopic resonant tunneling operations and, consequently, improved performance of the new modes of use described.
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公开(公告)号：US20180267933A1
公开(公告)日：2018-09-20
申请号：US15984074
申请日：2018-05-18
申请人： D-Wave Systems Inc.
摘要： Systems, devices, articles, methods, and techniques for advancing quantum computing by removing unwanted interactions in one or more quantum processor. One approach includes creating an updated plurality of programmable parameters based at least in part on a received value for the characteristic magnetic susceptibility of the qubit in the at least one quantum processor, and returning the updated plurality of programmable parameters. Examples programmable parameters include local biases, and coupling values characterizing the problem Hamilton. Also, for example, a quantum processor may be summarized as including a first loop of superconducting material, a first compound Josephson junction interrupting the first loop of superconducting material, a first coupler inductively coupled to the first loop of superconducting material, a second coupler inductively coupled to the first loop of superconducting material, and a second loop of superconducting material proximally placed to the first loop of superconducting material inductively coupled to the first coupler and the second coupler.
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公开(公告)号：US20180240035A1
公开(公告)日：2018-08-23
申请号：US15902739
申请日：2018-02-22
申请人： Rigetti & Co., Inc.
IPC分类号： G06N99/00 , G06F15/82 , G01R33/035 , H01L27/18 , G06F17/21 , H03K19/195 , H01L39/22
CPC分类号： G06N10/00 , G01R33/035 , G01R33/0358 , G06F15/82 , G06F17/215 , G06F17/5009 , G06F2217/68 , G06N5/003 , H01L27/18 , H01L39/223 , H03K19/195
摘要： In a general aspect, a superconducting quantum circuit system is modeled. In some aspects, a graph representing a quantum circuit system is generated. The graph includes vertices and edges; the edges represent circuit elements of the quantum circuit system, and the vertices represent physical connections between the circuit elements. Inverse inductances, conductances, capacitances, and junction inverse inductances are assigned to respective edges of the graph based on a lumped-element approximation of the quantum circuit system. A coordinate system is determined based on the graph, and a matrix representation of the system is determined based on the coordinate system. A Hamiltonian for the quantum circuit system is determined using the matrix representation, and the quantum circuit system is simulated based on the Hamiltonian.
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