MAPPING AND WRITTING METHOD IN MEMORY DEVICE WITH MULTIPLE MEMORY CHIPS
    1.
    发明申请
    MAPPING AND WRITTING METHOD IN MEMORY DEVICE WITH MULTIPLE MEMORY CHIPS 审中-公开
    具有多个存储卡的存储器件中的映射和写入方法

    公开(公告)号:US20110302355A1

    公开(公告)日:2011-12-08

    申请号:US12793701

    申请日:2010-06-04

    Applicant: Gene Lin

    Inventor: Gene Lin

    CPC classification number: G06F12/0246 G06F2212/7201

    Abstract: The invention is directed to a mapping method in a memory device with a plurality of memory chips in a sequence of 0 to K, K≧1. Each of the memory chips has a plurality of data blocks. The mapping method includes setting a block sequence number “(K+1)*n” to the (n+1)th data block of the memory chip K, wherein n is a positive integer greater than or equal to 0. Based on the mapping method, a writing method is also provided.

    Abstract translation: 本发明涉及具有多个存储器芯片的存储器件中的映射方法,该存储器芯片的序列为0至K,K≥1。 每个存储器芯片具有多个数据块。 映射方法包括将块序列号“(K + 1)* n”设置到存储芯片K的第(n + 1)个数据块,其中n是大于或等于0的正整数。基于 映射方法,还提供了一种写入方法。

    Method and apparatus for detecting and removing kernel rootkits
    2.
    发明授权
    Method and apparatus for detecting and removing kernel rootkits 有权
    用于检测和删除内核根目录的方法和装置

    公开(公告)号:US07802300B1

    公开(公告)日:2010-09-21

    申请号:US11702965

    申请日:2007-02-06

    CPC classification number: G06F21/55

    Abstract: In one embodiment, an anti-rootkit module compares operating system kernel binary files to their loaded kernel file image in memory to find a difference between them. The difference may be scanned for telltale signs of rootkit modification. To prevent rootkits from interfering with memory access of the kernel file image, a pre-scan may be performed to ensure that paging functions and the interrupt dispatch table are in known good condition. If the difference is due to a rootkit modification, the kernel file image may be restored to a known good condition to disable the rootkit. A subsequent virus scan may be performed to remove remaining traces of the rootkit and other malicious codes from the computer.

    Abstract translation: 在一个实施例中,反rootkit模块将操作系统内核二进制文件与其在内存中加载的内核文件映像进行比较以找到它们之间的差异。 可能会扫描不同之处,以了解rootkit修改的说明。 为了防止rootkit干扰内核文件映像的内存访问,可以执行预扫描以确保寻呼功能和中断分派表处于已知的良好状态。 如果差异是由于rootkit修改造成的,内核文件映像可能恢复到已知的良好状态以禁用rootkit。 可以执行后续病毒扫描,以从计算机中删除rootkit和其他恶意代码的剩余痕迹。

    Access time adjusting circuit and method for non-volatile memory
    3.
    发明授权
    Access time adjusting circuit and method for non-volatile memory 有权
    非易失性存储器的访问时间调整电路和方法

    公开(公告)号:US07382655B2

    公开(公告)日:2008-06-03

    申请号:US11459361

    申请日:2006-07-23

    Applicant: Gene Lin

    Inventor: Gene Lin

    CPC classification number: G11C16/32 G11C2207/2254

    Abstract: An access time adjusting circuit is used in a non-volatile memory to obtain an optimized access time in operation. The circuit includes an access time detecting unit, used to detect a performance status of the non-volatile memory under an operation clock and output the performance status. An access time controlling unit is used to generate at least one adjusting operation clock. Each adjusting operation clock serves as the operation clock for the non-volatile memory. In addition, the non-volatile memory, the access time controlling unit, and the access time detecting unit are connected to form a detection and adjustment loop, so that an optimized operation clock is determined after checking the at least one adjusting operation clock.

    Abstract translation: 在非易失性存储器中使用访问时间调整电路,以获得操作中优化的访问时间。 该电路包括访问时间检测单元,用于在操作时钟下检测非易失性存储器的性能状态并输出性能状态。 访问时间控制单元用于产生至少一个调整操作时钟。 每个调整操作时钟用作非易失性存储器的操作时钟。 另外,非易失性存储器,访问时间控制单元和访问时间检测单元被连接以形成检测和调整循环,从而在检查至少一个调整操作时钟之后确定优化的操作时钟。

    ACCESS TIME ADJUSTING CIRCUIT AND METHOD FOR NON-VOLATILE MEMORY
    4.
    发明申请
    ACCESS TIME ADJUSTING CIRCUIT AND METHOD FOR NON-VOLATILE MEMORY 有权
    访问时间调整电路和非易失性存储器的方法

    公开(公告)号:US20080019209A1

    公开(公告)日:2008-01-24

    申请号:US11459361

    申请日:2006-07-23

    Applicant: Gene Lin

    Inventor: Gene Lin

    CPC classification number: G11C16/32 G11C2207/2254

    Abstract: An access time adjusting circuit is used in a non-volatile memory to obtain an optimized access time in operation. The circuit includes an access time detecting unit, used to detect a performance status of the non-volatile memory under an operation clock and output the performance status. An access time controlling unit is used to generate at least one adjusting operation clock. Each the adjusting operation clock serves as the operation clock for the non-volatile memory. In addition, the non-volatile memory, the access time controlling unit, and the access time detecting unit are connected to form a detection and adjustment loop, so that an optimized operation clock is determined after checking the at least one adjusting operation clock.

    Abstract translation: 在非易失性存储器中使用访问时间调整电路,以获得操作中优化的访问时间。 该电路包括访问时间检测单元,用于在操作时钟下检测非易失性存储器的性能状态并输出性能状态。 访问时间控制单元用于产生至少一个调整操作时钟。 每个调整操作时钟用作非易失性存储器的操作时钟。 另外,非易失性存储器,访问时间控制单元和访问时间检测单元被连接以形成检测和调整循环,从而在检查至少一个调整操作时钟之后确定优化的操作时钟。

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