公开(公告)号：US5578956A

公开(公告)日：1996-11-26

申请号：US615729

申请日：1996-03-14

申请人： Giorgio Rossi ,  Fabio Marchioo ,  Liana Luoni ,  Franco Cocetta

发明人： Giorgio Rossi ,  Fabio Marchioo ,  Liana Luoni ,  Franco Cocetta

IPC分类号： H03G11/00 ,  H03F1/52 ,  H03G11/02 ,  H03K17/082 ,  H03K5/08

CPC分类号： H03F1/523 ,  H03K17/0822

摘要： The invention concerns a circuit for limiting the maximum current to be supplied to a load through a power MOS, being an improvement of the limiting circuitry which uses an equalizing capacitor. The addition of circuitry with a one-way current flow between a terminal of the equalizing capacitor and the gate terminal of the power MOS is effective to lower the voltage across the capacitor and to speed up its charging process, thereby making the current limiting action expected from the circuit a timely one. The circuitry which limits current flow to one direction may include a second MOS of the same type as the power MOS. In this way, any deviations of the power MOS from its designed operation, e.g. due to its manufacturing process variation and thermal drift phenomena, can also be compensated.

摘要翻译： 本发明涉及一种用于限制通过功率MOS提供给负载的最大电流的电路，其是使用均衡电容器的限制电路的改进。 在均衡电容器的端子和功率MOS的栅极端子之间添加具有单向电流的电路有效地降低电容器两端的电压并加速其充电过程，从而使预期的电流限制动作 从电路及时的一个。 限制电流流向一个方向的电路可以包括与功率MOS相同类型的第二MOS。 以这种方式，功率MOS与其设计的操作的任何偏差，例如 由于其制造工艺变化和热漂移现象，也可以补偿。