公开(公告)号：US08809947B1

公开(公告)日：2014-08-19

申请号：US13905741

申请日：2013-05-30

Applicant: GlobalFoundries, Inc.

Inventor： Kerem Murat Akarvardar ,  Ajey Poovannummoottil Jacob

IPC: H01L29/08 ,  H01L29/16 ,  H01L29/78 ,  H01L21/20

CPC classification number: H01L29/785 ,  H01L29/66795

Abstract: In an exemplary embodiment, a method for fabricating integrated circuits includes providing a semiconductor substrate. The method etches the semiconductor substrate to form a non-planar transistor structure having sidewalls. On a standard (100) substrate the fin sidewalls have (110) surface plane if the fins are aligned or perpendicular with the wafer notch. The method includes depositing a sacrificial liner along the sidewalls of the non-planar transistor structure. Further, a confining material is deposited overlying the semiconductor substrate and adjacent the sacrificial liner. The method includes removing at least a portion of the sacrificial liner and forming a void between the sidewalls of the non-planar transistor structure and the confining material. A cladding layer is epitaxially grown in the void. Since the sidewall growth is limited by the confining material, a cladding layer of uniform thickness is enabled on fins with (110) sidewall and (100) top surface.

Abstract translation: 在示例性实施例中，制造集成电路的方法包括提供半导体衬底。 该方法蚀刻半导体衬底以形成具有侧壁的非平面晶体管结构。 在标准（100）<110>衬底上，如果翅片与<110>晶片切口对准或垂直，翅片侧壁具有（110）表面。 该方法包括沿非平面晶体管结构的侧壁沉积牺牲衬垫。 此外，将约束材料沉积在半导体衬底上并且邻近牺牲衬垫。 该方法包括去除牺牲衬垫的至少一部分并在非平面晶体管结构的侧壁与限制材料之间形成空隙。 在空隙中外延生长包层。 由于侧壁生长被限制材料限制，因此在具有（110）侧壁和（100）顶表面的翅片上能够实现均匀厚度的包覆层。