公开(公告)号：US11837605B2

公开(公告)日：2023-12-05

申请号：US17644858

申请日：2021-12-17

Applicant: GlobalFoundries U.S. Inc.

Inventor： Tom Herrmann ,  Zhixing Zhao ,  Alban Zaka ,  Yiching Chen

IPC: H01L27/12 ,  H01L21/84 ,  H01L29/78 ,  H01L29/06

CPC classification number: H01L27/1203 ,  H01L21/84 ,  H01L29/0653 ,  H01L29/7838

Abstract: A structure including a semiconductor-on-insulator (SOI) substrate. The SOI substrate includes an SOI layer over a buried insulator layer over a base semiconductor layer. The structure includes a high-voltage first field effect transistor (FET) adjacent to a high performance, low voltage second FET. The high voltage FET has a gate electrode on the buried insulator layer, and a source and a drain in the base semiconductor layer under the buried insulator layer. Hence, the buried insulator layer operates as a gate dielectric for the high voltage FET. The low voltage FET has a source and a drain over the buried insulator layer, i.e., in the SOI layer. A trench isolation is in each of the source and the drain of the first, high voltage FET. The source of the high voltage FET surrounds the trench isolation therein.

公开(公告)号：US20240055434A1

公开(公告)日：2024-02-15

申请号：US18493081

申请日：2023-10-24

Applicant: GlobalFoundries U.S. Inc.

Inventor： Tom Herrmann ,  Zhixing Zhao ,  Alban Zaka ,  Yiching Chen

IPC: H01L27/12 ,  H01L21/84 ,  H01L29/78 ,  H01L29/06

CPC classification number: H01L27/1203 ,  H01L21/84 ,  H01L29/7838 ,  H01L29/0653

Abstract: A structure including a semiconductor-on-insulator (SOI) substrate including a semiconductor-on-insulator (SOI) layer over a buried insulator layer over a base semiconductor layer. The structure further includes a first field effect transistor (FET) adjacent to a second FET, the first FET having a gate electrode on the buried insulator layer and a source and a drain in the base semiconductor layer under the buried insulator layer. The second FET has a source and a drain over the buried insulator layer. The structure further includes a trench isolation in each of the source and the drain of the first FET, the source of the first FET surrounding the trench isolation therein and the drain of the first FET surrounding the trench isolation therein.

公开(公告)号：US20230197731A1

公开(公告)日：2023-06-22

申请号：US17644858

申请日：2021-12-17

Applicant: GlobalFoundries U.S. Inc.

Inventor： Tom Herrmann ,  Zhixing Zhao ,  Alban Zaka ,  Yiching Chen

IPC: H01L27/12 ,  H01L29/06 ,  H01L29/78 ,  H01L21/84

CPC classification number: H01L27/1203 ,  H01L29/0653 ,  H01L29/7838 ,  H01L21/84

Abstract: A structure including a semiconductor-on-insulator (SOI) substrate. The SOI substrate includes an SOI layer over a buried insulator layer over a base semiconductor layer. The structure includes a high-voltage first field effect transistor (FET) adjacent to a high performance, low voltage second FET. The high voltage FET has a gate electrode on the buried insulator layer, and a source and a drain in the base semiconductor layer under the buried insulator layer. Hence, the buried insulator layer operates as a gate dielectric for the high voltage FET. The low voltage FET has a source and a drain over the buried insulator layer, i.e., in the SOI layer. A trench isolation is in each of the source and the drain of the first, high voltage FET. The source of the high voltage FET surrounds the trench isolation therein.