公开(公告)号：US20180005346A1

公开(公告)日：2018-01-04

申请号：US15201269

申请日：2016-07-01

Applicant: Google Inc.

Inventor： Albert MEIXNER ,  Daniel Frederic FINCHELSTEIN ,  David PATTERSON ,  William R. MARK ,  Jason Rupert REDGRAVE ,  Ofer SHACHAM

IPC: G06T1/20 ,  G11C19/28

CPC classification number: G06T1/20 ,  G06K9/00986 ,  G11C19/28

Abstract: A method is described that includes, on an image processor having a two dimensional execution lane array and a two dimensional shift register array, doubling a simultaneous shift amount of multiple rows or columns of the two dimensional shift register array with each next iteration. The method also includes executing one or more instructions within respective lanes of the two dimensional execution lane array in between shifts of iterations. Another method is described that includes, on an image processor having a two dimensional execution lane array and a two dimensional shift register array, repeatedly executing one or more instructions within respective lanes of the execution lane array that select between content in different registers of a same array location in between repeated simultaneous shifts of multiple rows or columns of data in the two dimensional shift register array.

公开(公告)号：US20180007302A1

公开(公告)日：2018-01-04

申请号：US15201237

申请日：2016-07-01

Applicant: Google Inc.

Inventor： Albert MEIXNER ,  Daniel Frederic FINCHELSTEIN ,  David PATTERSON ,  William R. MARK ,  Jason Rupert REDGRAVE ,  Ofer SHACHAM

IPC: H04N5/374 ,  H04N5/341

CPC classification number: H04N5/3742 ,  G06F5/015 ,  G06F12/0207 ,  G06F17/16 ,  G06T1/20 ,  H04N5/341

Abstract: A method is described that includes, on an image processor having a two dimensional execution lane array and a two dimensional shift register array, repeatedly shifting first content of multiple rows or columns of the two dimensional shift register array and repeatedly executing at least one instruction between shifts that operates on the shifted first content and/or second content that is resident in respective locations of the two dimensional shift register array that the shifted first content has been shifted into.

公开(公告)号：US20180005074A1

公开(公告)日：2018-01-04

申请号：US15201204

申请日：2016-07-01

Applicant: Google Inc.

Inventor： Ofer SHACHAM ,  David PATTERSON ,  William R. MARK ,  Albert MEIXNER ,  Daniel Frederic FINCHELSTEIN ,  Jason Rupert REDGRAVE

IPC: G06K9/56 ,  G06T5/20 ,  G06K9/46

Abstract: A method is described that includes executing a convolutional neural network layer on an image processor having an array of execution lanes and a two-dimensional shift register. The two-dimensional shift register provides local respective register space for the execution lanes. The executing of the convolutional neural network includes loading a plane of image data of a three-dimensional block of image data into the two-dimensional shift register. The executing of the convolutional neural network also includes performing a two-dimensional convolution of the plane of image data with an array of coefficient values by sequentially: concurrently multiplying within the execution lanes respective pixel and coefficient values to produce an array of partial products; concurrently summing within the execution lanes the partial products with respective accumulations of partial products being kept within the two dimensional register for different stencils within the image data; and, effecting alignment of values for the two-dimensional convolution within the execution lanes by shifting content within the two-dimensional shift register array.