公开(公告)号：US20170249921A1

公开(公告)日：2017-08-31

申请号：US15389168

申请日：2016-12-22

Applicant: Google Inc.

Inventor： Albert MEIXNER ,  Neeti DESAI ,  Dilan Manatunga ,  Jason Rupert REDGRAVE ,  William MARK

IPC: G09G5/00 ,  G06T1/20 ,  G09G5/02

CPC classification number: G09G5/006 ,  G06F12/06 ,  G06T1/20 ,  G06T1/60 ,  G06T2200/28 ,  G09G5/02 ,  G09G2340/02 ,  H04N1/32358 ,  H04N2201/3291

Abstract: An image processor is described. The image processor includes an I/O unit to read input image data from external memory for processing by the image processor and to write output image data from the image processor into the external memory. The I/O unit includes multiple logical channel units. Each logical channel unit is to form a logical channel between the external memory and a respective producing or consuming component within the image processor. Each logical channel unit is designed to utilize reformatting circuitry and addressing circuitry. The addressing circuitry is to control addressing schemes applied to the external memory and reformatting of image data between external memory and the respective producing or consuming component. The reformatting circuitry is to perform the reformatting.

公开(公告)号：US20170256230A1

公开(公告)日：2017-09-07

申请号：US15599086

申请日：2017-05-18

Applicant: Google Inc.

Inventor： Albert Meixner ,  Neeti Desai ,  Dilan Manatunga ,  Jason Rupert Redgrave ,  William Mark

IPC: G09G5/00 ,  G06T1/20 ,  G09G5/02

CPC classification number: G09G5/006 ,  G06F12/06 ,  G06T1/20 ,  G06T1/60 ,  G06T2200/28 ,  G09G5/02 ,  G09G2340/02 ,  H04N1/32358 ,  H04N2201/3291

Abstract: An image processor is described. The image processor includes an I/O unit to read input image data from external memory for processing by the image processor and to write output image data from the image processor into the external memory. The I/O unit includes multiple logical channel units. Each logical channel unit is to form a logical channel between the external memory and a respective producing or consuming component within the image processor. Each logical channel unit is designed to utilize reformatting circuitry and addressing circuitry. The addressing circuitry is to control addressing schemes applied to the external memory and reformatting of image data between external memory and the respective producing or consuming component. The reformatting circuitry is to perform the reformatting.