Two-stage block synchronization and scrambling
    1.
    发明申请
    Two-stage block synchronization and scrambling 有权
    两级块同步和加扰

    公开(公告)号:US20060093146A1

    公开(公告)日:2006-05-04

    申请号:US11255698

    申请日:2005-10-21

    IPC分类号: H04L9/00

    CPC分类号: H04L25/03866

    摘要: A two-stage block synchronization and scrambling module includes a synchronization PRNG module, a scramble PRNG module, a summing module, and a storage module. The synchronization PRNG module is clocked once per N+1 bit PCS frame (N arbitrary) to produce a synchronization bit and a pseudo-random starting state for the scramble PRNG. The scramble PRNG module is clocked N times per PCS frame to produce a cipher stream starting with a pseudo-random state from the synchronization PRNG. The summing module is operably coupled to sum the cipher stream and a PCS frame payload to produce scrambled payload. The storage module is operably coupled to store the scrambled payload with the synchronization bit. Synchronization bits from successive frames are a running bit-serial representation of the synchronization PRNG state and are used by the receiver to synchronize with the transmit scrambler.

    摘要翻译: 两级块同步和加扰模块包括同步PRNG模块,加扰PRNG模块,求和模块和存储模块。 每N + 1位PCS帧(N任意)为同步PRNG模块计时一次,以产生用于加扰PRNG的同步位和伪随机起始状态。 加扰PRNG模块按照PCS帧为N次计时,以产生从同步PRNG开始的伪随机状态的密码流。 求和模块可操作地耦合以对加密流和PCS帧有效载荷求和以产生加扰有效载荷。 存储模块可操作地耦合以存储具有同步位的加扰有效载荷。 来自连续帧的同步位是同步PRNG状态的运行位串行表示,并被接收机用于与发送扰频器同步。

    Low density parity check (LDPC) encoded higher order modulation
    3.
    发明授权
    Low density parity check (LDPC) encoded higher order modulation 失效
    低密度奇偶校验(LDPC)编码高阶调制

    公开(公告)号:US08503540B2

    公开(公告)日:2013-08-06

    申请号:US13620468

    申请日:2012-09-14

    IPC分类号: H04N7/12 H04N11/02

    摘要: A method and apparatus is disclosed to map a sequence of data to Quadrature Amplitude Modulation (QAM) constellation symbols. The method and apparatus encodes only a portion of the sequence of data and leaves a remaining portion of the sequence of data unencoded. The encoded portion of the sequence of data and the remaining unencoded portion of the sequence of data are then mapped into modulation symbols of the QAM constellation. The encoded portion of the sequence of data selects subsets of the QAM constellation, and the remaining unencoded portion of the sequence of data determines a specific modulation symbol within each subset of the QAM constellation.

    摘要翻译: 公开了一种将数据序列映射到正交幅度调制(QAM)星座符号的方法和装置。 该方法和装置仅对该数据序列的一部分进行编码,并留下未被编码的数据序列的剩余部分。 然后将数据序列的编码部分和数据序列的剩余未编码部分映射到QAM星座图的调制符号中。 数据序列的编码部分选择QAM星座的子集,并且数据序列的剩余未编码部分确定QAM星座图的每个子集内的特定调制符号。

    LDPC (Low Density Parity Check) coded 128 DSQ (Double Square QAM) constellation modulation and associated labeling
    4.
    发明授权
    LDPC (Low Density Parity Check) coded 128 DSQ (Double Square QAM) constellation modulation and associated labeling 失效
    LDPC(低密度奇偶校验)编码128 DSQ(双方QAM)星座调制和相关标签

    公开(公告)号:US07515642B2

    公开(公告)日:2009-04-07

    申请号:US11211210

    申请日:2005-08-25

    IPC分类号: H04L5/12

    摘要: LDPC (Low Density Parity Check) coded 128 DSQ (Double Square QAM) constellation modulation and its associated labeling. A novel means is introduced by which a constellation may be arranged and mapping in its symbols may be determined to provide for improved performance. One application area in which this may be employed is transmission over twisted pair (typically copper) cabling existent within data centers of various networks. The operation of the IEEE 802.3 Ethernet local area networks currently being used (as well as those currently under development) would benefit greatly by employing the various principles presented herein. When this novel approach of an LDPC coded 128 DSQ constellation modulation combined with TH (Tomlinson-Harashima) preceding is employed within a communication device at a transmitter end of a communication channel (i.e., in a transmitter and/or a transceiver), the overall operation of a communication system may improve significantly when compared to prior techniques.

    摘要翻译: LDPC(低密度奇偶校验)编码128 DSQ(双方QAM)星座调制及其相关标签。 引入了一种新颖的装置,通过该装置可以布置星座,并且可以确定其符号中的映射以提供改进的性能。 可以采用这种方式的一个应用领域是在各种网络的数据中心内存在的双绞线(通常为铜缆)布线。 目前正在使用的IEEE 802.3以太网局域网(以及目前正在开发中的那些)的运行将通过采用本文呈现的各种原理而受益匪浅。 当在通信信道(即,在发射机和/或收发机)的发射机端的通信设备内采用与TH(Tomlinson-Harashima)组合的LDPC编码的128个DSQ星座调制的新颖方法时, 与现有技术相比,通信系统的操作可以显着改善。

    TWO-STAGE BLOCK SYNCHRONIZATION AND SCRAMBLING
    5.
    发明申请
    TWO-STAGE BLOCK SYNCHRONIZATION AND SCRAMBLING 审中-公开
    两级块同步和SCRAMBLING

    公开(公告)号:US20120237032A1

    公开(公告)日:2012-09-20

    申请号:US13485749

    申请日:2012-05-31

    IPC分类号: H04L9/12 H04L9/16

    CPC分类号: H04L25/03866

    摘要: A two-stage block synchronization and scrambling module includes a synchronization PRNG module, a scramble PRNG module, a summing module, and a storage module. The synchronization PRNG module is clocked once per N+1 bit PCS frame (N arbitrary) to produce a synchronization bit and a pseudo-random starting state for the scramble PRNG. The scramble PRNG module is clocked N times per PCS frame to produce a cipher stream starting with a pseudo-random state from the synchronizationPRNG. The summing module is operably coupled to sum the cipher stream and a PCS frame payload to produce scrambled payload. The storage module is operably coupled to store the scrambled payload with the synchronization bit. Synchronization bits from successive frames are a running bit-serial representation of the synchronization PRNG state and are used by the receiver to synchronize with the transmit scrambler.

    摘要翻译: 两级块同步和加扰模块包括同步PRNG模块,加扰PRNG模块,求和模块和存储模块。 每N + 1位PCS帧(N任意)为同步PRNG模块计时一次,以产生用于加扰PRNG的同步位和伪随机起始状态。 加扰PRNG模块按照PCS帧为N次计时,以产生从同步PRNG开始的伪随机状态的密码流。 求和模块可操作地耦合以对加密流和PCS帧有效载荷求和以产生加扰有效载荷。 存储模块可操作地耦合以存储具有同步位的加扰有效载荷。 来自连续帧的同步位是同步PRNG状态的运行位串行表示,并被接收机用于与发送扰频器同步。

    Low Density Parity Check (LDPC) Encoded Higher Order Modulation
    6.
    发明申请
    Low Density Parity Check (LDPC) Encoded Higher Order Modulation 有权
    低密度奇偶校验(LDPC)编码高阶调制

    公开(公告)号:US20090129484A1

    公开(公告)日:2009-05-21

    申请号:US12272556

    申请日:2008-11-17

    IPC分类号: H04L27/36 H04N7/24

    摘要: A method and apparatus is disclosed to map a sequence of data to Quadrature Amplitude Modulation (QAM) constellation symbols. The method and apparatus encodes only a portion of the sequence of data and leaves a remaining portion of the sequence of data unencoded. The encoded portion of the sequence of data and the remaining unencoded portion of the sequence of data are then mapped into modulation symbols of the QAM constellation. The encoded portion of the sequence of data selects subsets of the QAM constellation, and the remaining unencoded portion of the sequence of data determines a specific modulation symbol within each subset of the QAM constellation.

    摘要翻译: 公开了一种将数据序列映射到正交幅度调制(QAM)星座符号的方法和装置。 该方法和装置仅对该数据序列的一部分进行编码,并留下未被编码的数据序列的剩余部分。 然后将数据序列的编码部分和数据序列的剩余未编码部分映射到QAM星座图的调制符号中。 数据序列的编码部分选择QAM星座的子集,并且数据序列的剩余未编码部分确定QAM星座图的每个子集内的特定调制符号。

    Low density parity check (LDPC) encoded higher order modulation
    8.
    发明授权
    Low density parity check (LDPC) encoded higher order modulation 有权
    低密度奇偶校验(LDPC)编码高阶调制

    公开(公告)号:US08275050B2

    公开(公告)日:2012-09-25

    申请号:US12272556

    申请日:2008-11-17

    IPC分类号: H04N7/12 H04N11/02

    摘要: A method and apparatus is disclosed to map a sequence of data to Quadrature Amplitude Modulation (QAM) constellation symbols. The method and apparatus encodes only a portion of the sequence of data and leaves a remaining portion of the sequence of data unencoded. The encoded portion of the sequence of data and the remaining unencoded portion of the sequence of data are then mapped into modulation symbols of the QAM constellation. The encoded portion of the sequence of data selects subsets of the QAM constellation, and the remaining unencoded portion of the sequence of data determines a specific modulation symbol within each subset of the QAM constellation.

    摘要翻译: 公开了一种将数据序列映射到正交幅度调制(QAM)星座符号的方法和装置。 该方法和装置仅对该数据序列的一部分进行编码,并留下未被编码的数据序列的剩余部分。 然后将数据序列的编码部分和数据序列的剩余未编码部分映射到QAM星座图的调制符号中。 数据序列的编码部分选择QAM星座的子集,并且数据序列的剩余未编码部分确定QAM星座图的每个子集内的特定调制符号。

    Two-stage block synchronization and scrambling
    9.
    发明授权
    Two-stage block synchronization and scrambling 有权
    两级块同步和加扰

    公开(公告)号:US08213611B2

    公开(公告)日:2012-07-03

    申请号:US11255698

    申请日:2005-10-21

    CPC分类号: H04L25/03866

    摘要: A two-stage block synchronization and scrambling module includes a synchronization PRNG module, a scramble PRNG module, a summing module, and a storage module. The synchronization PRNG module is clocked once per N+1 bit PCS frame (N arbitrary) to produce a synchronization bit and a pseudo-random starting state for the scramble PRNG. The scramble PRNG module is clocked N times per PCS frame to produce a cipher stream starting with a pseudo-random state from the synchronization PRNG. The summing module is operably coupled to sum the cipher stream and a PCS frame payload to produce scrambled payload. The storage module is operably coupled to store the scrambled payload with the synchronization bit. Synchronization bits from successive frames are a running bit-serial representation of the synchronization PRNG state and are used by the receiver to synchronize with the transmit scrambler.

    摘要翻译: 两级块同步和加扰模块包括同步PRNG模块,加扰PRNG模块,求和模块和存储模块。 每N + 1位PCS帧(N任意)为同步PRNG模块计时一次,以产生用于加扰PRNG的同步位和伪随机起始状态。 加扰PRNG模块按照PCS帧为N次计时,以产生从同步PRNG开始的伪随机状态的密码流。 求和模块可操作地耦合以对加密流和PCS帧有效载荷求和以产生加扰有效载荷。 存储模块可操作地耦合以存储具有同步位的加扰有效载荷。 来自连续帧的同步位是同步PRNG状态的运行位串行表示,并被接收机用于与发送扰频器同步。

    Method and system for 10GBASE-T start-up
    10.
    发明授权
    Method and system for 10GBASE-T start-up 有权
    10GBASE-T启动的方法和系统

    公开(公告)号:US08437366B2

    公开(公告)日:2013-05-07

    申请号:US13099760

    申请日:2011-05-03

    IPC分类号: H04J3/00 H04L12/26

    CPC分类号: H04L41/08 H04L12/403

    摘要: Certain aspects for the start-up procedure of transceivers supporting higher data rates over twisted-pair copper cabling are provided for 10 Gbit/sec Ethernet links (10GBASE-T). During a PMA (physical medium attachment) training period of the start-up procedure, long PMA training frames are exchanged periodically between link partners. A significant portion of each PMA training frame consists of known pseudo random sequences simultaneously transmitted over four wire pairs. PMA training frames include an InfoField for exchanging parameters and control information between link partners. For example, the InfoField's payload comprises fields for indicating current transmit power backoff (PBO), next PBO, requested PBO, transition count, control information, and for communicating precoder coefficients. Information in InfoFields is repeated and is not necessary that a link partner decodes every InfoField. For example, by occasionally reading the transition count, a link partner can determine when a change in transmit PBO and/or a state transition is to occur.

    摘要翻译: 为10Gbit /秒以太网链路(10GBASE-T)提供了通过双绞铜缆布线支持更高数据速率的收发器的启动过程的某些方面。 在启动程序的PMA(物理介质附加)训练期间,长链PMA训练帧在链路伙伴之间定期交换。 每个PMA训练帧的重要部分由通过四个线对同时传输的已知伪随机序列组成。 PMA培训框架包括用于在链接伙伴之间交换参数和控制信息的InfoField。 例如,InfoField的有效载荷包括用于指示当前发送功率回退(PBO),下一个PBO,所请求的PBO,转移计数,控制信息以及用于传达预编码器系数的字段。 InfoFields中的信息被重复,链接伙伴不需要对每个InfoField进行解码。 例如,通过偶尔读取转换计数,链路伙伴可以确定何时发生传输PBO和/或状态转换的变化。