公开(公告)号：US07536665B1

公开(公告)日：2009-05-19

申请号：US11492021

申请日：2006-07-25

申请人： Greg Horlick ,  Randall Lawson ,  Donald Morgan ,  Paul Musto ,  Joe Smedley ,  Ken Wadland ,  Richard Woodward ,  Sean Bergan ,  Walter M. Katz

发明人： Greg Horlick ,  Randall Lawson ,  Donald Morgan ,  Paul Musto ,  Joe Smedley ,  Ken Wadland ,  Richard Woodward ,  Sean Bergan ,  Walter M. Katz

IPC分类号： G06F17/50

CPC分类号： G06F17/5077

摘要： A mechanism is provided for the user to define a circuit design intent or strategy in the form of data that is stored with the design database. An autorouter then uses this guidance from the user to create a plan for routing the design. The user can then modify their guidance to the router until the results for the plan are acceptable. Using the planned flow, the autorouter can complete the design, creating detailed paths including etch segments and vias. Allowing such interaction with an autorouter significantly reduces the routing time and hence time-to-market.

摘要翻译： 提供了一种用于用户以与设计数据库一起存储的数据形式定义电路设计意图或策略的机制。 然后，自动布线器使用用户的指导来创建路由设计的计划。 然后，用户可以修改他们对路由器的指导，直到计划的结果可以接受。 使用计划流程，自动布线器可以完成设计，创建包括蚀刻段和通孔的详细路径。 允许与自动布线器的这种交互显着地减少了路由时间，从而缩短了上市时间。

公开(公告)号：US07620922B1

公开(公告)日：2009-11-17

申请号：US11556999

申请日：2006-11-06

申请人： Ken Wadland ,  Richard Woodward ,  Randall Lawson ,  Greg Horlick

发明人： Ken Wadland ,  Richard Woodward ,  Randall Lawson ,  Greg Horlick

IPC分类号： G06F17/50 ,  G06F9/45

CPC分类号： G06F17/5077

摘要： An approach is provided for selectively optimizing a circuit design, including generating a circuit routing solution according to a plurality of constraints for parametric resources of the circuit design, with the constraints being defined respectively by a plurality of corresponding constraint instances. Each constraint instance variably indicates an effective constraining limit and degree of consumption for at least one of the parametric resources. At least one of the constraints is selectively adjusted by a predetermined over-constraining amount, and the circuit routing solution is preliminarily modified by applying at least one routing action selected responsive to the constraint adjustment. The potential impact upon constraint compliance is evaluated, including generating a relative cost measure for the preliminary modification of the circuit routing solution, based at least partially upon each of the constraint instances. Thereafter, the preliminary modification of the circuit routing solution is either discarded or accepted responsive to the evaluation.

摘要翻译： 提供了一种用于选择性地优化电路设计的方法，包括根据电路设计的参数资源的多个约束生成电路布线解决方案，其中约束分别由多个相应的约束实例定义。 每个约束实例可变地指示至少一个参数资源的有效约束极限和消耗程度。 通过预定的过约束量选择性地调节约束中的至少一个，并且通过应用响应于约束调整选择的至少一个路由动作来初步修改电路路由解决方案。 评估对约束约束的潜在影响，包括至少部分地基于每个约束实例来生成用于电路路由解决方案的初步修改的相对成本度量。 此后，响应于评估，电路布线解决方案的初步修改被丢弃或接受。

公开(公告)号：US08146042B1

公开(公告)日：2012-03-27

申请号：US12618840

申请日：2009-11-16

申请人： Ken Wadland ,  Richard Woodward ,  Randall Lawson ,  Greg Horlick

发明人： Ken Wadland ,  Richard Woodward ,  Randall Lawson ,  Greg Horlick

IPC分类号： G06F17/50

CPC分类号： G06F17/5077

摘要： An approach is provided for selectively optimizing a circuit design to be physical implemented. The approach includes generating a circuit routing solution in accordance with a plurality of constraints for parametric resources of the circuit design, with the constraints being defined respectively by a plurality of corresponding constraint instances. Each constraint instance variably indicates an effective constraining limit and degree of consumption for at least one of the parametric resources. At least one of the constraints is selectively adjusted by a predetermined over-constraining amount, and the circuit routing solution is preliminarily modified by applying at least one routing action selected responsive to the constraint adjustment. An automatic evaluation is then made of the potential impact upon constraint compliance. The evaluation includes generating a relative cost measure for the preliminary modification of the circuit routing solution, based at least partially upon each of the constraint instances. Thereafter, the preliminary modification of said circuit routing solution is either discarded or accepted responsive to the evaluation. A number of these operations may be repeated in recursive manner, if appropriate for the given application.

摘要翻译： 提供了一种用于选择性地优化要物理实现的电路设计的方法。 该方法包括根据电路设计的参数资源的多个约束生成电路布线解决方案，其中约束分别由多个对应的约束实例定义。 每个约束实例可变地指示至少一个参数资源的有效约束极限和消耗程度。 通过预定的过约束量选择性地调节约束中的至少一个，并且通过应用响应于约束调整选择的至少一个路由动作来初步修改电路路由解决方案。 然后，对约束遵守的潜在影响进行自动评估。 该评估包括至少部分地基于每个约束实例来产生用于电路路由解决方案的初步修改的相对成本度量。 此后，响应于评估，所述电路布线解决方案的初步修改被丢弃或接受。 如果适用于给定的应用程序，可以递归地重复这些操作中的一些操作。

公开(公告)号：US08191032B1

公开(公告)日：2012-05-29

申请号：US12500191

申请日：2009-07-09

申请人： Ken Wadland ,  Sean Bergan ,  Randall Lawson ,  Keith Woodword ,  Richard Woodward

发明人： Ken Wadland ,  Sean Bergan ,  Randall Lawson ,  Keith Woodword ,  Richard Woodward

IPC分类号： G06F17/50

CPC分类号： G06F17/5077 ,  G06F17/5072

摘要： Local constraints on placement of routing objects for direct connections between terminals in a circuit layout are determined from global constraints on the placement of the routing objects in a process referred to as global constraint budgeting. An autorouter finds paths in the layout to satisfy the local constraints and ignores the global constraints. The local constraints are updated before each routing pass to ensure that routes are completed on individual direct connections while also satisfying the global constraint.

摘要翻译： 在电路布局中的终端之间的直接连接的路由对象布局的局部约束是从被称为全局约束预算的过程中的路由对象的布局的全局约束来确定的。 自动布线器查找布局中的路径以满足局部约束并忽略全局约束。 在每个路由传递之前更新本地约束，以确保在单个直接连接上完成路由，同时也满足全局约束。

公开(公告)号：US08549459B1

公开(公告)日：2013-10-01

申请号：US12834972

申请日：2010-07-13

申请人： Ken Wadland ,  Sean Bergan ,  Charles W. Grant ,  Glendine Kingsbury ,  Randall Lawson ,  Jelena Radumilo-Frankilin ,  Kota Sujan Reddy ,  Steve Russo ,  William Schilp ,  Davis Tsai ,  Keith Woodward ,  Richard Woodward ,  Jia Wu

发明人： Ken Wadland ,  Sean Bergan ,  Charles W. Grant ,  Glendine Kingsbury ,  Randall Lawson ,  Jelena Radumilo-Frankilin ,  Kota Sujan Reddy ,  Steve Russo ,  William Schilp ,  Davis Tsai ,  Keith Woodward ,  Richard Woodward ,  Jia Wu

IPC分类号： G06F17/50 ,  G06F9/44

CPC分类号： G06F17/5077

摘要： In one embodiment of the invention, an object oriented autorouter is disclosed for routing nets in a circuit. The object oriented autorouter includes a routing data model (RDM); at least one routing engine, such as a single connection router (SCR), a topographical (TOPO) transformation engine, and a detail geometric (DETAIL) engine, and a command and control module (CCM) coupled together. The RDM reads and write data with a design database as well as reading one or more object oriented design constraints. Each of the routing engines have at least one action to operate on the design database to improve compliance of the circuit to a constraint. The CCM controls the overall routing process of the nets in the circuit and includes at least one director to invoke at least one of the routing engines to achieve compliance with one or more constraints.

摘要翻译： 在本发明的一个实施例中，公开了一种面向对象的自动布线器，用于在电路中布线网络。 面向对象的自动布线器包括路由数据模型（RDM）; 至少一个路由引擎，例如单个连接路由器（SCR），地形（TOPO）转换引擎和细节几何（DETAIL）引擎，以及耦合在一起的命令和控制模块（CCM）。 RDM使用设计数据库读取和写入数据，以及读取一个或多个面向对象的设计约束。 每个路由引擎具有至少一个动作来对设计数据库进行操作以提高电路对约束的依从性。 CCM控制电路中网络的总体路由过程，并且包括至少一个导向器来调用至少一个路由引擎以实现符合一个或多个约束。

公开(公告)号：US07761836B1

公开(公告)日：2010-07-20

申请号：US11548288

申请日：2006-10-11

申请人： Ken Wadland ,  Sean Bergan ,  Charles W. Grant ,  Glendine Kingsbury ,  Randall Lawson ,  Jelena Radumilo-Franklin ,  Kota Sujan Reddy ,  Steve Russo ,  William Schilp ,  Davis Tsai ,  Keith Woodward ,  Richard Woodward ,  Jia Wu

发明人： Ken Wadland ,  Sean Bergan ,  Charles W. Grant ,  Glendine Kingsbury ,  Randall Lawson ,  Jelena Radumilo-Franklin ,  Kota Sujan Reddy ,  Steve Russo ,  William Schilp ,  Davis Tsai ,  Keith Woodward ,  Richard Woodward ,  Jia Wu

IPC分类号： G06F17/50

CPC分类号： G06F17/5077

摘要： In one embodiment of the invention, an object oriented autorouter is disclosed for routing nets in a circuit. The object oriented autorouter includes a routing data model (RDM); at least one routing engine, such as a single connection router (SCR), a topographical (TOPO) transformation engine, and a detail geometric (DETAIL) engine, and a command and control module (CCM) coupled together. The RDM reads and write data with a design database as well as reading one or more object oriented design constraints. Each of the routing engines have at least one action to operate on the design database to improve compliance of the circuit to a constraint. The CCM controls the overall routing process of the nets in the circuit and includes at least one director to invoke at least one of the routing engines to achieve compliance with one or more constraints.

摘要翻译： 在本发明的一个实施例中，公开了一种面向对象的自动布线器，用于在电路中布线网络。 面向对象的自动布线器包括路由数据模型（RDM）; 至少一个路由引擎，例如单个连接路由器（SCR），地形（TOPO）转换引擎和细节几何（DETAIL）引擎，以及耦合在一起的命令和控制模块（CCM）。 RDM使用设计数据库读取和写入数据，以及读取一个或多个面向对象的设计约束。 每个路由引擎具有至少一个动作来对设计数据库进行操作以提高电路对约束的依从性。 CCM控制电路中网络的总体路由过程，并且包括至少一个导向器来调用至少一个路由引擎以实现符合一个或多个约束。

公开(公告)号：US07562330B1

公开(公告)日：2009-07-14

申请号：US11556837

申请日：2006-11-06

申请人： Ken Wadland ,  Sean Bergan ,  Randall Lawson ,  Keith Woodword ,  Richard Woodward

发明人： Ken Wadland ,  Sean Bergan ,  Randall Lawson ,  Keith Woodword ,  Richard Woodward

IPC分类号： G06F17/50

CPC分类号： G06F17/5077 ,  G06F17/5072

摘要： Local constraints on placement of routing objects for direct connections between terminals in a circuit layout are determined from global constraints on the placement of the routing objects in a process referred to as global constraint budgeting. An autorouter finds paths in the layout to satisfy the local constraints and ignores the global constraints. The local constraints are updated before each routing pass to ensure that routes are completed on individual direct connections while also satisfying the global constraint.

摘要翻译： 在电路布局中的终端之间的直接连接的路由对象布局的局部限制是从被称为全局约束预算的过程中路由对象的放置的全局约束确定的。 自动布线器查找布局中的路径以满足局部约束并忽略全局约束。 在每个路由传递之前更新本地约束，以确保在单个直接连接上完成路由，同时也满足全局约束。

公开(公告)号：US07793249B1

公开(公告)日：2010-09-07

申请号：US11564083

申请日：2006-11-28

申请人： Ken Wadland ,  Greg Horlick ,  Randall Lawson

发明人： Ken Wadland ,  Greg Horlick ,  Randall Lawson

IPC分类号： G06F17/50

CPC分类号： G06F17/5077

摘要： Automatic bundle filtering is provided to selectively configure a circuit design having a plurality of component terminals for physical implementation. A placement of components is established for a layout of the circuit design, and a plurality of connections to be routed between predetermined terminals of the components are defined for the layout, with a certain plurality of them selectively grouped into at least one candidate bundle. At least one filter is applied to the connections of each candidate bundle for responsive segregation according to a preselected connection discriminant into one or more updated bundle candidates. Each updated bundle candidate is preferably evaluated in accordance with at least one preselected bundling criteria to identify acceptable bundle candidates therefrom. Bundles corresponding to the acceptable bundle candidates are then generated.

摘要翻译： 提供自动捆绑过滤以选择性地配置具有用于物理实现的多个组件终端的电路设计。 针对电路设计的布局建立部件的放置，并且为组件定义要在组件的预定端子之间路由的多个连接，其中特定的多个选择性地被分组成至少一个候选束。 根据预先选择的连接判别式将至少一个滤波器应用于每个候选束的连接以进行响应分离，以使其成为一个或多个更新的束候选。 优选地根据至少一个预先选择的捆绑标准来评估每个更新的束候选，以从其中识别可接受的束候选。 然后生成与可接受的束候选对应的束。

公开(公告)号：US08789060B1

公开(公告)日：2014-07-22

申请号：US11965695

申请日：2007-12-27

申请人： Ken Wadland ,  Charles W. Grant ,  Randall Lawson ,  Richard Allen Woodward, Jr. ,  Sean Bergan

发明人： Ken Wadland ,  Charles W. Grant ,  Randall Lawson ,  Richard Allen Woodward, Jr. ,  Sean Bergan

IPC分类号： G06F9/46 ,  G06F13/00 ,  G06F9/45

CPC分类号： G06F9/52 ,  G06F2209/484

摘要： A method, computer program product and apparatus for utilizing simulated locking prior to starting concurrent execution are disclosed. The results of this simulated locking are used to define a canonical ordering which controls the order of execution and the degree of parallelism that can be used.

摘要翻译： 公开了一种在开始并发执行之前利用模拟锁定的方法，计算机程序产品和装置。 该模拟锁定的结果用于定义控制执行顺序和可以使用的并行程度的规范排序。

公开(公告)号：US20060242614A1

公开(公告)日：2006-10-26

申请号：US11115042

申请日：2005-04-25

申请人： Ken Wadland ,  Richard Woodward ,  Randall Lawson ,  Walter Katz ,  Wiley Gillmor

发明人： Ken Wadland ,  Richard Woodward ,  Randall Lawson ,  Walter Katz ,  Wiley Gillmor

IPC分类号： G06F17/50

CPC分类号： G06F17/5077

摘要： A method and system that converges on a global solution to a PCB routing problem using iterations of topology-based routing is described. In some embodiments, the geometric design space is abstracted into a topological graph representing the routing problem. Then, each net is allowed to find its optimal solution path independent of the solution paths for all other nets. The electrical and physical constraints of the system are initially ignored or greatly relaxed. Over each design iteration, the constraints are tightened until a complete, global, topological solution is found. Once a topological solution is found, it is converted into a geometric solution. In the event that no geometric solution exists for that topological solution, then the iteration process is resumed taking into consideration this additional information. The result is the ability to quickly autoroute highly-constrained PCB designs with minimal operator input.

摘要翻译： 描述了使用迭代基于拓扑的路由收敛于PCB路由问题的全局解决方案和系统。 在一些实施例中，将几何设计空间抽象为表示路由问题的拓扑图。 然后，允许每个网络找到其与所有其他网络的解路径无关的最优解路径。 系统的电气和物理限制最初被忽略或大大放宽。 在每个设计迭代中，约束被收紧，直到找到完整的全局拓扑解决方案。 一旦找到拓扑解决方案，就将其转换为几何解。 在该拓扑解决方案不存在几何解的情况下，则会考虑到这些附加信息来恢复迭代过程。 结果是能够以最小的操作员输入快速自动布线高度受限制的PCB设计。