Method and arrangement for annealing of strips
    1.
    发明申请
    Method and arrangement for annealing of strips 审中-公开
    条的退火方法和布置

    公开(公告)号:US20060049160A1

    公开(公告)日:2006-03-09

    申请号:US10937449

    申请日:2004-09-08

    IPC分类号: H05B1/00

    摘要: The invention is relating to an arrangement for annealing a strip (1) with direct resistance heating comprising at least two rotable supported rollers (2, 7; 8, 9; 12, 13; 17, 18, 19), where at least one of said rollers (2; 8, 9; 12, 13; 17, 18) is having a plurality of electrically conductive segments (5) at the circumference of the said roller (2; 8, 9; 12, 13; 17, 18), which segments (5) are insulated from each other and where the electric current is conducted simultaneously to only a part of said electrically conductive segments (5) by at least one sliding contact (3, 4; 10, 11; 14, 15, 16) so that the electric contact to the segment (5) is made after the mechanical contact of the strip (1) and the electrical contact being disconnected from the segment (5) before the mechanical contact is disconnected. It is also relating to a method for annealing a strip (1).

    摘要翻译: 本发明涉及一种用于对具有直接电阻加热的条带(1)进行退火的装置,其包括至少两个可旋转的支撑辊(2,7; 8,9; 12,13; 17,18,19),其中至少一个 所述辊(2; 8,9; 12,13; 17,18)在所述辊(2; 8,9; 12,13; 17,18)的圆周处具有多个导电段(5) ,所述段(5)彼此绝缘,并且其中电流仅通过至少一个滑动接触(3,4; 10,11; 14,15,15)同时传导到所述导电段(5)的一部分, 16),使得在机械接触断开之前,在条带(1)和电触头与片段(5)断开连接的机械接触之后,对片段(5)进行电接触。 它还涉及退火条(1)的方法。

    Resampling synchronizer of digitally sampled signals
    3.
    发明授权
    Resampling synchronizer of digitally sampled signals 失效
    数字采样信号的同步器重新采样

    公开(公告)号:US5513209A

    公开(公告)日:1996-04-30

    申请号:US23946

    申请日:1993-02-26

    申请人: Gunnar Holm

    发明人: Gunnar Holm

    CPC分类号: H04L7/0029 H03H17/0628

    摘要: A digital resampling system is provided for converting a first digital signal to a second digital signal, where both signals represent the same analog signal but sampled at two different clock rates which are not phase-locked together. A filter is clocked by the first clock and outputs filtered samples at the first clock rate, optionally omitting samples which will not be used. A phase indicator determines the relative phase position of the first and second clocks and indicates an integer phase value and a fractional phase value which together indicate where a tick of the second clock falls among the ticks of the first clock. The integer phase value identifies a clock cycle of the first clock in which a tick of the second clock occurs, and the fractional phase value represents a fraction identifying a position of the tick of the second clock within the clock cycle of the first clock. A sample selector selects M filtered samples from those provided by the non-decimating filter based on the integer phase value. A weight generator generates M weights based on the fractional phase value, and a weight averager weights the M filtered samples by the M weights, and outputs a sum or an average of the weighted samples. The resampler is applicable to digital-to-digital resampling, as well as resampling in an analog-to-digital or digital-to-analog conversion system.

    摘要翻译: 提供数字重采样系统,用于将第一数字信号转换为第二数字信号,其中两个信号表示相同的模拟信号,但是以两个不相位锁定在一起的不同时钟速率采样。 滤波器由第一个时钟计时,并以第一个时钟速率输出滤波后的采样,可选地省略不使用的采样。 相位指示器确定第一和第二时钟的相对相位位置,并且指示整数相位值和分数相位值,它们一起指示第二时钟的刻度落在第一时钟的时钟之间的时刻。 整数相位值标识第一时钟的时钟周期,其中发生第二时钟的刻度,并且分数相位值表示在第一时钟的时钟周期内识别第二时钟的刻度的位置的分数。 样本选择器基于整数相位值来选择由非抽取滤波器提供的M个滤波样本。 权重发生器基于分数相位值产生M个权重,并且权重平均器将M个经滤波的样本加权M个权重,并输出加权样本的和或平均值。 重采样器适用于数字数字重采样,以及模数转换系统或数模转换系统中的重采样。