公开(公告)号：USD656468S1

公开(公告)日：2012-03-27

申请号：US29393112

申请日：2011-05-31

申请人： Gwui Youn Park ,  Duk Jin Jun ,  Hong Hyoun Kim ,  Jae Jin Choi ,  Jong Bum Choi ,  Dong Hyun Yu ,  Je Kwon Yoon

设计人： Gwui Youn Park ,  Duk Jin Jun ,  Hong Hyoun Kim ,  Jae Jin Choi ,  Jong Bum Choi ,  Dong Hyun Yu ,  Je Kwon Yoon

公开(公告)号：US20080224294A1

公开(公告)日：2008-09-18

申请号：US11749441

申请日：2007-05-16

申请人： Hong Hyoun Kim

发明人： Hong Hyoun Kim

IPC分类号： H01L23/495 ,  H01L23/02

CPC分类号： H01L23/49551 ,  H01L23/3107 ,  H01L23/49575 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/16 ,  H01L2224/16145 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/10156 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A multi-chip package with a single die pad is provided. The multi-chip package includes a leadframe having a die pad and a plurality of leads surrounding the die pad. Each of the leads includes an upper lead, a lower lead and an intermediate lead substantially perpendicularly connected to the upper and lower leads, wherein the upper and lower leads are substantially parallel to the die pad. The upper and lower surfaces of the die pad are attached with upper and lower chips respectively. The upper chip is electrically connected to the upper surface of one part of the upper leads by a plurality of first bonding wires and the lower chip is electrically connected to the lower surfaces of the other part of the upper leads by a plurality of second bonding wires. A sealant is used to encapsulate the chips and bonding wires to protect these elements from damage.

摘要翻译： 提供具有单个管芯焊盘的多芯片封装。 多芯片封装包括具有管芯焊盘和围绕管芯焊盘的多个引线的引线框架。 每个引线包括上引线，下引线和基本垂直地连接到上引线和下引线的中间引线，其中上引脚和下引线基本上平行于管芯焊盘。 芯片焊盘的上表面和下表面分别与上和下芯片连接。 上芯片通过多个第一接合线电连接到上引线的一部分的上表面，并且下芯片通过多个第二接合线电连接到上引线的另一部分的下表面 。 密封剂用于封装芯片和接合线以保护这些元件免受损坏。

公开(公告)号：US07535084B2

公开(公告)日：2009-05-19

申请号：US11749441

申请日：2007-05-16

申请人： Hong Hyoun Kim

发明人： Hong Hyoun Kim

IPC分类号： H01L23/495

CPC分类号： H01L23/49551 ,  H01L23/3107 ,  H01L23/49575 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/16 ,  H01L2224/16145 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/10156 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A multi-chip package with a single die pad is provided. The multi-chip package includes a leadframe having a die pad and a plurality of leads surrounding the die pad. Each of the leads includes an upper lead, a lower lead and an intermediate lead substantially perpendicularly connected to the upper and lower leads, wherein the upper and lower leads are substantially parallel to the die pad. The upper and lower surfaces of the die pad are attached with upper and lower chips respectively. The upper chip is electrically connected to the upper surface of one part of the upper leads by a plurality of first bonding wires and the lower chip is electrically connected to the lower surfaces of the other part of the upper leads by a plurality of second bonding wires. A sealant is used to encapsulate the chips and bonding wires to protect these elements from damage.

摘要翻译： 提供具有单个管芯焊盘的多芯片封装。 多芯片封装包括具有管芯焊盘和围绕管芯焊盘的多个引线的引线框架。 每个引线包括上引线，下引线和基本垂直地连接到上引线和下引线的中间引线，其中上引脚和下引线基本上平行于管芯焊盘。 芯片焊盘的上表面和下表面分别与上和下芯片连接。 上芯片通过多个第一接合线电连接到上引线的一部分的上表面，并且下芯片通过多个第二接合线电连接到上引线的另一部分的下表面 。 密封剂用于封装芯片和接合线以保护这些元件免受损坏。