公开(公告)号：US11221967B2

公开(公告)日：2022-01-11

申请号：US14780392

申请日：2013-03-28

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Gregg B. Lesartre ,  Blaine D. Gaither ,  Dale C. Morris ,  Carey Huscroft ,  Russ W. Herrell

IPC: G06F12/08 ,  G06F12/0808 ,  G06F12/0815 ,  G06F12/14 ,  G06F12/02 ,  G06F21/79

Abstract: A system and method for addressing split modes of persistent memory are described herein. The system includes a non-volatile memory comprising regions of memory, each region comprising a range of memory address spaces. The system also includes a memory controller (MC) to control access to the non-volatile memory. The system further includes a device to track a mode of each region of memory and to define the mode of each region of memory. The mode is a functional use model.

公开(公告)号：US20190340053A1

公开(公告)日：2019-11-07

申请号：US15973527

申请日：2018-05-07

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Gregg B. Lesartre ,  Dale C. Morris ,  Russ W. Herrell ,  Blaine D. Gaither

IPC: G06F11/07 ,  H04L12/24

Abstract: A technique includes receiving an alert indicator in a distributed computer system that includes a plurality of computing nodes coupled together by cluster interconnection fabric. The alert indicator indicates detection of a fault in a first computing node of the plurality of computing nodes. The technique indicates regulating communication between the first computing node and at least one of the other computing nodes in response to the alert indicator to contain error propagation due to the fault within the first computing node.

公开(公告)号：US10452498B2

公开(公告)日：2019-10-22

申请号：US14901559

申请日：2013-06-28

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Gregg B. Lesartre ,  Dale C. Morris ,  Gary Gostin ,  Russ W. Herrell ,  Andrew R. Wheeler ,  Blaine D. Gaither

IPC: G06F11/00 ,  G06F11/16 ,  G06F11/10 ,  G06F11/20

Abstract: A computing system can include a processor and a persistent main memory including a fault tolerance capability. The computing system can also include a memory controller to store data in the persistent main memory and create redundant data. The memory controller can also store the redundant data remotely with respect to the persistent main memory. The memory controller can further access the redundant data during failure of the persistent main memory.