公开(公告)号：US20210033673A1

公开(公告)日：2021-02-04

申请号：US16528500

申请日：2019-07-31

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： John E. Tilleman ,  Peter David Maroni ,  Erin Hallinan

IPC: G01R31/3185 ,  H03K19/177 ,  G01R31/319 ,  G01R31/3187

Abstract: A programmable integrated circuit may include logic, signal select hardware, programmable signal analysis hardware, an embedded microcontroller, and a hardware interface. The logic performs one or more functions and outputs a plurality of signals. The signal select hardware selects one or more of the signals output from the logic. The programmable signal analysis hardware analyzes the selected signals to produce diagnostic data. The embedded microcontroller receives the diagnostic data from the programmable signal analysis hardware and may reconfigure the logic based on the diagnostic data. The hardware interface connects the programmable signal analysis hardware and the embedded microcontroller to transport the diagnostic data.

公开(公告)号：US20210034375A1

公开(公告)日：2021-02-04

申请号：US16527580

申请日：2019-07-31

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Peter David Maroni ,  John E. Tillema ,  Erin Hallinan ,  Michael Joseph Howe

IPC: G06F9/4401 ,  H03K19/177 ,  G06F9/24

Abstract: A method of initializing an application-specific integrated circuit (ASIC), the method including reading, by a boot microcode engine integrated with the ASIC, microcode from an electrically programmable non-volatile memory (EP-NVM) integrated on a same die as the ASIC. The method further includes writing the microcode onto internal memories of a micro-controller of the ASIC and initializing the micro-controller by the boot microcode engine. The method also includes loading, by the micro-controller, a full boot image from an additional storage device distinct from the EP-NVM onto the internal memories of the micro-controller and initializing the ASIC by the micro-controller based on the full boot image.

公开(公告)号：US11822930B2

公开(公告)日：2023-11-21

申请号：US16527580

申请日：2019-07-31

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Peter David Maroni ,  John E. Tillema ,  Erin Hallinan ,  Michael Joseph Howe

IPC: G06F9/00 ,  G06F9/4401 ,  H03K19/1776 ,  G06F9/24 ,  H03K19/17772

CPC classification number: G06F9/4403 ,  G06F9/24 ,  H03K19/1776 ,  H03K19/17772

Abstract: A method of initializing an application-specific integrated circuit (ASIC), the method including reading, by a boot microcode engine integrated with the ASIC, microcode from an electrically programmable non-volatile memory (EP-NVM) integrated on a same die as the ASIC. The method further includes writing the microcode onto internal memories of a micro-controller of the ASIC and initializing the micro-controller by the boot microcode engine. The method also includes loading, by the micro-controller, a full boot image from an additional storage device distinct from the EP-NVM onto the internal memories of the micro-controller and initializing the ASIC by the micro-controller based on the full boot image.

公开(公告)号：US20170317785A1

公开(公告)日：2017-11-02

申请号：US15143445

申请日：2016-04-29

Applicant: Hewlett Packard Enterprise Development LP

Inventor： David M. Olson ,  John Wastlick ,  Erin Hallinan ,  Jason Jung ,  Kevin B. Leigh

IPC: H04L1/00

CPC classification number: G06F11/0709 ,  H04L1/0041 ,  H04L1/0045 ,  H04L1/0075 ,  H04L69/24 ,  H04L69/28

Abstract: A network re-timer with forward error correction handling is disclosed. An example network re-timer includes a first receiver to receive data from a first connected device and to re-time the data to generate re-timed data, a first transmitter to transmit the re-timed data to a second connected device, a first auto-negotiation handler communicatively coupled to the first receiver to control a first forward error correction mode for communications with the first connected device, and a second auto-negotiation handler communicatively coupled to the first transmitter to control a second forward error correction mode for communications with the second connected device, wherein the first forward error correction mode is different than the second forward error correction mode.

公开(公告)号：US11092647B2

公开(公告)日：2021-08-17

申请号：US16528500

申请日：2019-07-31

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： John E. Tilleman ,  Peter David Maroni ,  Erin Hallinan

IPC: G01R31/3185 ,  H03K19/177 ,  G01R31/319 ,  G01R31/3187 ,  H03K19/17728 ,  H03K19/1776

Abstract: A programmable integrated circuit may include logic, signal select hardware, programmable signal analysis hardware, an embedded microcontroller, and a hardware interface. The logic performs one or more functions and outputs a plurality of signals. The signal select hardware selects one or more of the signals output from the logic. The programmable signal analysis hardware analyzes the selected signals to produce diagnostic data. The embedded microcontroller receives the diagnostic data from the programmable signal analysis hardware and may reconfigure the logic based on the diagnostic data. The hardware interface connects the programmable signal analysis hardware and the embedded microcontroller to transport the diagnostic data.

公开(公告)号：US10002038B2

公开(公告)日：2018-06-19

申请号：US15143445

申请日：2016-04-29

Applicant: Hewlett Packard Enterprise Development LP

Inventor： David M. Olson ,  John Wastlick ,  Erin Hallinan ,  Jason Jung ,  Kevin B. Leigh

IPC: G06F11/00 ,  G06F11/07 ,  H04L1/00

CPC classification number: G06F11/0709 ,  H04L1/0041 ,  H04L1/0045 ,  H04L1/0075 ,  H04L69/24 ,  H04L69/28

Abstract: A network re-timer with forward error correction handling is disclosed. An example network re-timer includes a first receiver to receive data from a first connected device and to re-time the data to generate re-timed data, a first transmitter to transmit the re-timed data to a second connected device, a first auto-negotiation handler communicatively coupled to the first receiver to control a first forward error correction mode for communications with the first connected device, and a second auto-negotiation handler communicatively coupled to the first transmitter to control a second forward error correction mode for communications with the second connected device, wherein the first forward error correction mode is different than the second forward error correction mode.