公开(公告)号：US09929899B2

公开(公告)日：2018-03-27

申请号：US14911350

申请日：2013-09-20

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Michael Kontz ,  Derek Alan Sherlock

IPC: H04L12/24 ,  H04L12/703 ,  H04L12/801 ,  H04L12/939

CPC classification number: H04L41/0663 ,  H04L45/28 ,  H04L47/11 ,  H04L47/12 ,  H04L47/29 ,  H04L49/557

Abstract: A blockage is detected at a first link based on a delay and/or stoppage of transmission of a data message along the first link between first and second nodes of a plurality of nodes of a fabric. A snapshot message is sent along at least a second link between the first and second nodes in response to the blockage being detected. The second node may capture a fabric state at the second node in response to receiving the snapshot message, before a corrective action occurs.

公开(公告)号：US20190317893A1

公开(公告)日：2019-10-17

申请号：US15952861

申请日：2018-04-13

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Michael Kontz ,  Kaitlyn Walker ,  Jacob Burnham

IPC: G06F12/06 ,  G06F12/10

Abstract: An integrated circuit (IC) exposes hardware blocks thereof via an addressable control space defining fields at corresponding global addresses. The addressable control space is shared across the hardware blocks. Each hardware block has implemented fields; the implemented fields of a hardware block are mapped to a subset of the fields of the addressable control space. One or more implemented fields of more than one hardware block are each mapped to the same field of the addressable control space. A hardware block internally compresses the fields of the addressable control space in accordance with its implemented fields to perform a write operation. A hardware block internally expands the implemented fields to the fields of the addressable control space to perform a read operation.

公开(公告)号：US10664369B2

公开(公告)日：2020-05-26

申请号：US15500063

申请日：2015-01-30

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Derek Alan Sherlock ,  Harvey Ray ,  Michael Kontz

IPC: G06F11/20 ,  G06F11/07 ,  G06F11/10

Abstract: According to an example, a failed component in a fault-tolerant memory fabric may be determined by transmitting request packets along a plurality of routes between the redundancy controller and a media controller in periodic cycles. The redundancy controller may determine whether route failures for all of the plurality of routes have occurred within a number of consecutive periodic cycles. In response to determining that route failures for all of the plurality of routes have occurred within a number of consecutive periodic cycles, the media controller is established as failed. In response to determining that route failures for less than all of the plurality of routes have occurred within the number of consecutive periodic cycles, a fabric device is established as failed.