Sparsifying neural network models

    公开(公告)号:US11645529B2

    公开(公告)日:2023-05-09

    申请号:US15967835

    申请日:2018-05-01

    CPC classification number: G06N3/082 G06N3/04 G06N3/063

    Abstract: A technique includes modifying a neural network model to sparsify the model. The model includes a plurality of kernel element weights, which are parameterized according to a plurality of dimensions. Modifying the model includes, in a given iteration of the plurality of iterations, training the model based on a structure regularization in which kernel element weights that share a dimension in common are removed as a group to create corresponding zero kernel elements in the model; and compressing the model to exclude zero kernel element weights from the model to prepare the model to be trained in another iteration.

    SPARSIFYING NEURAL NETWORK MODELS
    2.
    发明申请

    公开(公告)号:US20190340510A1

    公开(公告)日:2019-11-07

    申请号:US15967835

    申请日:2018-05-01

    Abstract: A technique includes modifying a neural network model to sparsify the model. The model includes a plurality of kernel element weights, which are parameterized according to a plurality of dimensions. Modifying the model includes, in a given iteration of the plurality of iterations, training the model based on a structure regularization in which kernel element weights that share a dimension in common are removed as a group to create corresponding zero kernel elements in the model; and compressing the model to exclude zero kernel element weights from the model to prepare the model to be trained in another iteration.

    ANALOG FRONT-END
    3.
    发明申请

    公开(公告)号:US20220140914A1

    公开(公告)日:2022-05-05

    申请号:US16949592

    申请日:2020-11-05

    Abstract: Examples described herein relate to an analog front-end (AFE). The AFE includes a trans-impedance amplifier to receive an input current and generate a pair of the differential voltage signals based on the input current and a reference current. Further, the AFE includes a dynamic voltage slicer to receive the differential voltage signals at input terminals and supply digital voltages at output terminals. The dynamic voltage slicer includes a preamplifier to generate a pair of intermediate voltages based on the differential voltage signals sampled at a predetermined frequency. The dynamic voltage slicer also includes a voltage latch circuit coupled to the preamplifier, wherein the voltage latch circuit is to regenerate a pair of digital voltages based on the pair of the intermediate voltages. Moreover, the AFE includes a logic latch coupled to the dynamic voltage slicer to provide digital output states based on the pair of the digital voltages.

    Analog front-end
    5.
    发明授权

    公开(公告)号:US11323183B1

    公开(公告)日:2022-05-03

    申请号:US16949592

    申请日:2020-11-05

    Abstract: Examples described herein relate to an analog front-end (AFE). The AFE includes a trans-impedance amplifier to receive an input current and generate a pair of the differential voltage signals based on the input current and a reference current. Further, the AFE includes a dynamic voltage slicer to receive the differential voltage signals at input terminals and supply digital voltages at output terminals. The dynamic voltage slicer includes a preamplifier to generate a pair of intermediate voltages based on the differential voltage signals sampled at a predetermined frequency. The dynamic voltage slicer also includes a voltage latch circuit coupled to the preamplifier, wherein the voltage latch circuit is to regenerate a pair of digital voltages based on the pair of the intermediate voltages. Moreover, the AFE includes a logic latch coupled to the dynamic voltage slicer to provide digital output states based on the pair of the digital voltages.

    REDUCING SUPPLY VOLTAGES OF OPTICAL TRANSMITTER DEVICES

    公开(公告)号:US20200145100A1

    公开(公告)日:2020-05-07

    申请号:US16495187

    申请日:2017-04-07

    Abstract: Examples described herein relate to reducing a magnitude of a supply voltage for a circuit element of an optical transmitter device. In some such examples, the circuit element is a driving element that is to receive a first electrical data signal and to provide a second electrical data signal to an optical element that is to provide an optical data signal. A testing element is to compare the optical data signal to the first electrical data signal to determine whether the optical transmitter device meets a performance threshold. When the device meets the performance threshold, a regulating element is to reduce a magnitude of the supply voltage of the driving element.

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