公开(公告)号：US20190324868A1

公开(公告)日：2019-10-24

申请号：US15957552

申请日：2018-04-19

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Suhas Shivanna ,  Mahesh Babu Ramaiah ,  Clarete Riana Crasta ,  Viratkumar Maganlal Manvar ,  Thomas L. Vaden ,  Andrew Brown

IPC: G06F11/14 ,  G06F11/16 ,  G06F13/28 ,  G06F12/02 ,  G06F3/06

Abstract: Examples disclosed herein relate to backing up persistent memory. There is at least one memory addressable by at least one processor. The persistent memory includes a persistent memory region with multiple portions. A secondary storage includes a first backup of the persistent memory region. Modifications to the persistent memory region are tracked. Updated portions associated with the modifications are written to the secondary storage.

公开(公告)号：US20210367855A1

公开(公告)日：2021-11-25

申请号：US16878968

申请日：2020-05-20

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Jyothi M. Pampaiah ,  Murali Nidugala ,  Viratkumar Maganlal Manvar ,  Aditya Bigganahalli Satyanarayana ,  RAVI TEJA Jammulapati

IPC: H04L12/24 ,  G06N20/00 ,  H04L12/825

Abstract: Systems which support an asymmetric link define rules and policies in each individual physical layer. An asymmetric link is a physical layer with a different number of transmit versus receive lanes. Asymmetric links enable physical layers to optimize performance, power, and system resources based on the required data bandwidth per direction across a link. Modern applications exhibit large demands for high memory bandwidth, i.e., more memory channels and larger bandwidth per channel. The utilization data, patterns) of link usage, and/or patterns) of lane usage may be gathered to exploit the facilities provided by asymmetric links. An engine includes AI-fueled analytics to monitor, orchestrate resources, and provide optimal routing, exploiting asymmetric links, lane polarity, and enqueue-dequeue in a computing ecosystem.

公开(公告)号：US20210191712A1

公开(公告)日：2021-06-24

申请号：US16722392

申请日：2019-12-20

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Viratkumar Maganlal Manvar ,  Kapil Porwal ,  Jeke Kumar Gochhayat ,  Raksha Sudhakar Shetty

IPC: G06F8/654 ,  G06F9/48

Abstract: Example implementations relate to method and system for storing and applying updates to a firmware at runtime of a processor-based system. The processor-based system includes a system management (SM) memory, a platform hardware, a main processor, the firmware, and a hotfix-framework. The hotfix-framework includes a hotfix dispatcher module and a service driver module having one or more boot time resources. The firmware and the hotfix-framework are pre-executed in the SM memory. The platform hardware stores a hotfix-firmware including updates to the firmware into a memory of the processor-based system, and generates an interrupt to direct the main processor into an SM mode and get the hotfix-framework notification about the hotfix-firmware. The hotfix dispatcher module loads the hotfix-firmware from the memory into the SM memory, and executes the hotfix-firmware by utilizing the one or more boot time resources to apply the updates to the firmware at runtime of the processor-based system.

公开(公告)号：US11329890B2

公开(公告)日：2022-05-10

申请号：US16878968

申请日：2020-05-20

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Jyothi M Pampaiah ,  Murali Nidugala ,  Viratkumar Maganlal Manvar ,  Aditya Bigganahalli Satyanarayana ,  Ravi Teja Jammulapati

IPC: G06F15/173 ,  H04L41/16 ,  G06N20/00 ,  H04L47/25 ,  H04L41/14 ,  H04L41/12

Abstract: Systems which support an asymmetric link define rules and policies in each individual physical layer. An asymmetric link is a physical layer with a different number of transmit versus receive lanes. Asymmetric links enable physical layers to optimize performance, power, and system resources based on the required data bandwidth per direction across a link. Modern applications exhibit large demands for high memory bandwidth, i.e., more memory channels and larger bandwidth per channel. The utilization data, patterns) of link usage, and/or patterns) of lane usage may be gathered to exploit the facilities provided by asymmetric links. An engine includes AI-fueled analytics to monitor, orchestrate resources, and provide optimal routing, exploiting asymmetric links, lane polarity, and enqueue-dequeue in a computing ecosystem.

公开(公告)号：US11256499B2

公开(公告)日：2022-02-22

申请号：US16722392

申请日：2019-12-20

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Viratkumar Maganlal Manvar ,  Kapil Porwal ,  Jeke Kumar Gochhayat ,  Raksha Sudhakar Shetty

IPC: G06F9/44 ,  G06F8/654 ,  G06F9/48

Abstract: Example implementations relate to method and system for storing and applying updates to a firmware at runtime of a processor-based system. The processor-based system includes a system management (SM) memory, a platform hardware, a main processor, the firmware, and a hotfix-framework. The hotfix-framework includes a hotfix dispatcher module and a service driver module having one or more boot time resources. The firmware and the hotfix-framework are pre-executed in the SM memory. The platform hardware stores a hotfix-firmware including updates to the firmware into a memory of the processor-based system, and generates an interrupt to direct the main processor into an SM mode and get the hotfix-framework notification about the hotfix-firmware. The hotfix dispatcher module loads the hotfix-firmware from the memory into the SM memory, and executes the hotfix-firmware by utilizing the one or more boot time resources to apply the updates to the firmware at runtime of the processor-based system.