公开(公告)号：US20180218712A1

公开(公告)日：2018-08-02

申请号：US15747118

申请日：2015-07-24

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Chanh V HUA ,  Mujeeb Ur REHMAN ,  Yuchen XU

IPC: G09G5/36 ,  G09G5/00 ,  G06F3/14

Abstract: Example implementations relate to a system for enabling compression of a video output. For example, the system can include a circuit board including a plurality of slots, each slot to receive a module, a multiplexor coupled between the plurality of slots, and a management controller, among other components. The management controller can detect a respective type of module coupled to each of the plurality of slots and instruct the multiplexor to transmit signals between a first slot among the plurality of slots and a second slot among the plurality of slots in response to detection of a graphics coprocessor module coupled to the first slot and an accelerator module coupled to the second slot. Similarly, the management controller can compress a video output from the first slot using the second slot.