公开(公告)号：US20140215160A1

公开(公告)日：2014-07-31

申请号：US13754758

申请日：2013-01-30

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： Onur Kocberber ,  Kevin T. Lim ,  Parthasarathy Ranganathan

IPC: G06F12/08

CPC classification number: G06F12/0891 ,  G06F12/0862 ,  G06F12/0897 ,  G06F2212/6012 ,  G06F2212/6022 ,  Y02D10/13

Abstract: A method of using a buffer within an indexing accelerator during periods of inactivity, comprising flushing indexing specific data located in the buffer, disabling a controller within the indexing accelerator, handing control of the buffer over to a higher level cache, and selecting one of a number of operation modes of the buffer. An indexing accelerator, comprising a controller and a buffer communicatively coupled to the controller, in which, during periods of inactivity, the controller is disabled and a buffer operating mode among a number of operating modes is chosen under which the buffer will be used.

Abstract translation: 一种在不活动期间在索引加速器内使用缓冲器的方法，包括：对位于所述缓冲器中的特定数据进行刷新索引，禁用所述索引加速器内的控制器，将所述缓冲器的控制权交给更高级别的缓存，以及选择 缓冲区的操作模式数。 索引加速器，包括通信地耦合到控制器的控制器和缓冲器，其中在非活动期间控制器被禁用，并且在多个操作模式之间选择缓冲器操作模式，在该缓冲器操作模式下使用缓冲器。

公开(公告)号：US20160070701A1

公开(公告)日：2016-03-10

申请号：US14888237

申请日：2013-07-31

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： Kevin T. Lim ,  Onur Kocberber ,  Parthasarathy Ranganathan

IPC: G06F17/30

CPC classification number: G06F16/2255 ,  G06F12/0859 ,  G06F12/0862 ,  Y02D10/13

Abstract: According to an example, an indexing accelerator with memory-level parallelism (MLP) support may include a request decoder to receive indexing requests. The request decoder may include a plurality of configuration registers. A controller may be communicatively coupled to the request decoder to support MLP by assigning an indexing request of the received indexing requests to a configuration register of the plurality of configuration registers. A buffer may be communicatively coupled to the controller to store data related to an indexing operation of the controller for responding to the indexing request.

Abstract translation: 根据示例，具有存储器级并行性（MLP）支持的索引加速器可以包括用于接收索引请求的请求解码器。 请求解码器可以包括多个配置寄存器。 控制器可以通信地耦合到请求解码器以通过将接收到的索引请求的索引请求分配给多个配置寄存器的配置寄存器来支持MLP。 缓冲器可以通信地耦合到控制器以存储与用于响应索引请求的控制器的索引操作相关的数据。

公开(公告)号：US08984230B2

公开(公告)日：2015-03-17

申请号：US13754758

申请日：2013-01-30

Applicant: Hewlett-Packard Development Company, L.P.

Inventor： Onur Kocberber ,  Kevin T. Lim ,  Parthasarathy Ranganathan

IPC: G06F12/08

CPC classification number: G06F12/0891 ,  G06F12/0862 ,  G06F12/0897 ,  G06F2212/6012 ,  G06F2212/6022 ,  Y02D10/13

Abstract: A method of using a buffer within an indexing accelerator during periods of inactivity, comprising flushing indexing specific data located in the buffer, disabling a controller within the indexing accelerator, handing control of the buffer over to a higher level cache, and selecting one of a number of operation modes of the buffer. An indexing accelerator, comprising a controller and a buffer communicatively coupled to the controller, in which, during periods of inactivity, the controller is disabled and a buffer operating mode among a number of operating modes is chosen under which the buffer will be used.

Abstract translation: 一种在不活动期间在索引加速器内使用缓冲器的方法，包括：对位于所述缓冲器中的特定数据进行刷新索引，禁用所述索引加速器内的控制器，将所述缓冲器的控制权交给更高级别的缓存，以及选择 缓冲区的操作模式数。 索引加速器，包括通信地耦合到控制器的控制器和缓冲器，其中在非活动期间控制器被禁用，并且在多个操作模式之间选择缓冲器操作模式，在该缓冲器操作模式下使用缓冲器。