公开(公告)号：US20190044630A1

公开(公告)日：2019-02-07

申请号：US16074053

申请日：2016-04-22

Applicant: Hewlett-Packard Development Company, L.P.

Inventor： Ronaldo Rob Ferreira ,  ENDRIGO Nadin PINHEIRO ,  Adilson Arthur Mohr ,  Fabio Delazeri Riffel ,  Jose Paulo Xavier Pires ,  Christopher Charles Mohrman ,  Valiuddin Y Ali

IPC: H04B17/318 ,  G06F3/12

Abstract: Example implementations relate to signal strength based printings. In an example, signal strength based printings can employ a personal computing device including a network adapter coupled to a computer network, an antenna to receive a wireless signal from a mobile electronic device, a processor to compare a signal strength indication (RSSI) value of the received wireless signal to a RSSI threshold value, and send, via the network adapter, a printable file to a printer based on the comparison of the RSSI value to the RSSI threshold value.

公开(公告)号：US11520894B2

公开(公告)日：2022-12-06

申请号：US16895535

申请日：2020-06-08

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： Jeffrey Kevin Jeansonne ,  Valiuddin Y Ali ,  James M. Mann ,  Boris Balacheff

IPC: G06F21/57 ,  G06F9/4401 ,  G06F21/55

Abstract: A controller that is separate from a processor of the system verifies controller code for execution on the controller. In response to verifying the controller code, the controller verifies system boot code.

公开(公告)号：US10733288B2

公开(公告)日：2020-08-04

申请号：US14780892

申请日：2013-04-23

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： Jeffrey Kevin Jeansonne ,  Valiuddin Y Ali ,  James M Mann ,  Boris Balacheff

IPC: G06F21/55 ,  G06F21/57 ,  G06F9/4401

Abstract: A controller that is separate from a processor of the system verifies controller code for execution on the controller. In response to verifying the controller code, the controller verifies a system boot code.

公开(公告)号：US10089472B2

公开(公告)日：2018-10-02

申请号：US14781604

申请日：2013-04-23

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： Jeffrey Kevin Jeansonne ,  Valiuddin Y Ali ,  James M Mann

IPC: G06F21/57 ,  G06F9/44 ,  G06F9/4401 ,  G06F21/56

Abstract: An event data structure is stored in a non-volatile memory that is electrically isolated from a bus accessible by a processor. In response to an event relating to operation of a controller that is separate from the processor, the controller adds event data for the event into an entry of the event data structure.

公开(公告)号：US10721005B2

公开(公告)日：2020-07-21

申请号：US16074053

申请日：2016-04-22

Applicant: Hewlett-Packard Development Company, L.P.

Inventor： Ronaldo Rob Ferreira ,  Endrigo Nadin Pinheiro ,  Adilson Arthur Mohr ,  Fabio Delazeri Riffel ,  Jose Paulo Xavier Pires ,  Christopher Charles Mohrman ,  Valiuddin Y Ali

IPC: H04B17/318 ,  G06F3/12

Abstract: Example implementations relate to signal strength based printings. In an example, signal strength based printings can employ a personal computing device including a network adapter coupled to a computer network, an antenna to receive a wireless signal from a mobile electronic device, a processor to compare a signal strength indication (RSSI) value of the received wireless signal to a RSSI threshold value, and send, via the network adapter, a printable file to a printer based on the comparison of the RSSI value to the RSSI threshold value.

公开(公告)号：US09990255B2

公开(公告)日：2018-06-05

申请号：US14780981

申请日：2013-04-23

Applicant: Hewlett-Packard Development Company, L.P.

Inventor： Jeffrey Kevin Jeansonne ,  Valiuddin Y Ali ,  Boris Balacheff

IPC: G06F11/00 ,  G06F11/14 ,  G06F3/06 ,  G06F11/16

CPC classification number: G06F11/1469 ,  G06F3/0619 ,  G06F3/0629 ,  G06F3/0683 ,  G06F11/1417 ,  G06F11/1456 ,  G06F11/1458 ,  G06F11/1612 ,  G06F2201/83 ,  G06F2201/84

Abstract: A first non-volatile memory stores a redundant copy of system data that relates to a configuration of at least one physical component of a system, where the first non-volatile memory is accessible by a controller in the system and inaccessible to a processor in the system. It is determined whether system data in a second non-volatile memory accessible by the processor is compromised. In response to determining that the system data in the second non-volatile memory is compromised, the compromised system data in the second non-volatile memory is repaired.

公开(公告)号：US09880908B2

公开(公告)日：2018-01-30

申请号：US14780967

申请日：2013-04-23

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： Jeffrey Kevin Jeansonne ,  Valiuddin Y Ali ,  Lan Wang

IPC: G06F11/00 ,  G06F11/14 ,  G06F21/57 ,  G06F3/06

CPC classification number: G06F11/1469 ,  G06F3/0619 ,  G06F3/0629 ,  G06F3/0683 ,  G06F21/572 ,  G06F2201/84

Abstract: In a state of a system in which a processor of the system is not accessing a first memory, a controller in the system determines whether system boot code from the first memory in the system is compromised, wherein the first memory is accessible by the processor and the controller over a bus. In response to determining that the system boot code is compromised, the controller retrieves system boot code from a second memory in the computing device to replace the system boot code in the first memory, where the second memory is electrically isolated from the bus and is inaccessible by the processor.