公开(公告)号：US11102299B2

公开(公告)日：2021-08-24

申请号：US16323999

申请日：2017-03-22

申请人： HITACHI, LTD.

发明人： Hirofumi Inomata ,  Yusuke Funaya ,  Tetsuro Honmura

IPC分类号： H04L29/08 ,  G06F9/54

摘要： A data processing system includes a plurality of computers which include a processor and a memory, a storage device which is connected to the plurality of computers to store data, and a management computer controls the plurality of computers. The computer includes a node pool which can perform, stop, and delete one or more nodes. The node pool includes one or more first nodes which function as a data buffer. The management computer causes the node to measure a performance of data transmission between the data buffer and the storage device, determines a number of increased/decreased nodes on the basis of a measurement result of the performance, and notifies the node pool of a command of performing or deleting the first node according to the determined number of increased/decreased nodes. The node pool adjusts a number of the first nodes according to performing or deleting command.

公开(公告)号：US10592274B2

公开(公告)日：2020-03-17

申请号：US15755441

申请日：2015-10-26

申请人： HITACHI, LTD.

发明人： Katsuto Sato ,  Tetsuro Honmura

IPC分类号： G06F9/52 ,  G06F9/46 ,  G06F13/16 ,  G06F3/06 ,  G06F9/455 ,  G06F9/54

摘要： This computer system includes: at least one computer having a memory and a plurality of CPU cores; and a storage sub device having a plurality of logical storage units configured using storage devices. In the computer, a plurality of queues are configured in the memory, and at least one of the plurality of CPU cores is assigned to each of the plurality of queues. The queue is enqueued with an I/O command dispatched from a CPU core, to which the queue is assigned, to a logical storage unit. The computer system has access control information including information concerning whether to accept or refuse access from each queue to each logical storage unit.

公开(公告)号：US10154113B2

公开(公告)日：2018-12-11

申请号：US15505751

申请日：2014-10-17

申请人： HITACHI, LTD.

发明人： Tetsuro Honmura ,  Yoshifumi Fujikawa ,  Keisuke Hatasaki ,  Mitsuhiro Okada ,  Akifumi Suzuki

IPC分类号： G06F12/08 ,  H04L29/08 ,  G06F3/06 ,  G06F12/0804 ,  G06F12/0868 ,  G06F12/0875

摘要： A computer system according to one preferred embodiment of the present invention has a server and a storage subsystem, wherein the server is configured to enable data write to a cache area of the storage subsystem. Further, the server manages the usages of the cache area. When storing data from the server to the cache area, the server determines whether a data-writable area exists in the cache area or not. If there is a writable area, data is stored in the writable area.