公开(公告)号：US3781573A

公开(公告)日：1973-12-25

申请号：US3781573D

申请日：1972-09-05

Applicant: HONEYWELL INF SYSTEMS

Inventor： WEEDEN O

IPC: G01R29/027 ,  H03K5/13 ,  H03K17/26

CPC classification number: H03K5/13 ,  G01R29/0273

Abstract: The solid-state circuit employs the combination of a retriggerable one-shot, a timing circuit and a master-slave flipflop to build a basic timer. This timer can be used as a timedelay relay, a tone decoder, a pulse width detector or as a variety of other timing units which require accurate measurements of time durations.

公开(公告)号：US3764977A

公开(公告)日：1973-10-09

申请号：US3764977D

申请日：1972-11-24

Applicant: HONEYWELL INF SYSTEMS

Inventor： WEEDEN O

IPC: H04L5/14 ,  H04M11/06 ,  G06F3/05 ,  G06F7/00 ,  H03K17/00

CPC classification number: H04L5/143 ,  H04M11/06

Abstract: A plurality of solid-state one-shots, logic gates and JK flipflops are used to provide a compact modem control having improved reliability of operation. The solid-state logic circuits improve the accuracy of the timing over modem controls using relays.

Abstract translation: 多个固态单触发，逻辑门和JK触发器用于提供具有改进的操作可靠性的紧凑型调制解调器控制。 固态逻辑电路通过使用继电器来提高调制解调器控制时序的准确性。