-
公开(公告)号:US10199977B1
公开(公告)日:2019-02-05
申请号:US15783695
申请日:2017-10-13
Applicant: HONEYWELL INTERNATIONAL INC.
Inventor: Ali Mohammadpour , Andrew Love , Louis Pu , Mike Guidry
Abstract: Electrical systems and devices with substrate interconnections having reduced parasitic inductance are provided. A first substrate includes one or more capacitors and plurality of connection interfaces, wherein a first subset of connection interfaces electrically connected to a first reference voltage are interleaved with a second subset of connection interfaces electrically connected to a different reference voltage. A second substrate includes a third subset of connection interfaces are electrically connected to a first terminal of a first switching element and the first subset of connection interfaces and a fourth subset of connection interfaces electrically connected to a second terminal of a second switching element and the second subset of connection interfaces, and the third subset and the fourth subset are also interleaved.