公开(公告)号：US20230133490A1

公开(公告)日：2023-05-04

申请号：US18147936

申请日：2022-12-29

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Liangen QIU ,  Yi Li ,  Baoyao Yang

IPC: G06F3/06

Abstract: A memory initialization apparatus and method, and a computer system are provided. The memory initialization apparatus includes a first processor core and a memory controller that includes at least one second processor core. In a memory initialization process, the first processor core may invoke the second processor core to perform memory initialization. This helps to shorten memory initialization duration.

公开(公告)号：US12254200B2

公开(公告)日：2025-03-18

申请号：US18147936

申请日：2022-12-29

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Liangen Qiu ,  Yi Li ,  Baoyao Yang

IPC: G06F3/06

Abstract: A memory initialization apparatus and method, and a computer system are provided. The memory initialization apparatus includes a first processor core and a memory controller that includes at least one second processor core. In a memory initialization process, the first processor core may invoke the second processor core to perform memory initialization. This helps to shorten memory initialization duration.

公开(公告)号：US12236108B2

公开(公告)日：2025-02-25

申请号：US18160164

申请日：2023-01-26

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Liangen Qiu ,  Baoyao Yang ,  Binyang Gong

IPC: G06F1/04 ,  G06F1/12 ,  G06F3/06 ,  G06F5/06

Abstract: A processor, a signal adjustment method, and a computer system including the processor are provided, pertaining to the field of computer technologies. The processor includes a memory controller. The memory controller includes a memory physical interface and a first processor core, and the first processor core is connected to the memory physical interface. After the computer system is started and during a running process of the computer system, the first processor core is configured to adjust a timing relationship between a target signal of the memory physical interface and a synchronization signal of the target signal. According to this application, timing alignment can be ensured between the target signal and the synchronization signal, thereby improving correctness of sampling performed on the target signal.

公开(公告)号：US20230176751A1

公开(公告)日：2023-06-08

申请号：US18160164

申请日：2023-01-26

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Liangen Qiu ,  Baoyao Yang ,  Binyang Gong

IPC: G06F3/06

CPC classification number: G06F3/0619 ,  G06F3/0629 ,  G06F3/0673

Abstract: A processor, a signal adjustment method, and a computer system including the processor are provided, pertaining to the field of computer technologies. The processor includes a memory controller. The memory controller includes a memory physical interface and a first processor core, and the first processor core is connected to the memory physical interface. After the computer system is started and during a running process of the computer system, the first processor core is configured to adjust a timing relationship between a target signal of the memory physical interface and a synchronization signal of the target signal. According to this application, timing alignment can be ensured between the target signal and the synchronization signal, thereby improving correctness of sampling performed on the target signal.