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公开(公告)号:US20230091617A1
公开(公告)日:2023-03-23
申请号:US18070986
申请日:2022-11-29
Applicant: HUAWEI TECHNOLOGIES CO, LTD.
Inventor: Yongyao LI , Fei LUO , Jiang ZHU
IPC: H04L25/03
Abstract: An equalization training method and apparatus are described. The method includes obtaining a training rate of each of a master chip and a slave chip in a target phase of equalization training. The method also includes determining a target rate threshold interval within which the training rate in the target phase falls, determining, based on a correspondence between N+1 rate threshold intervals and N+1 equalization timeout periods, a target equalization timeout period corresponding to the target rate threshold interval, and configuring the target equalization timeout period as an equalization timeout period in the target phase. According to this method, an equalization timeout period used for equalization training can be flexibly configured for each equalization training process, so that the configured equalization timeout period better conforms to a training rate currently used for link negotiation, to better ensure that an equalization parameter is found within the configured equalization timeout period, thereby improving an equalization training success rate.
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公开(公告)号:US20210297228A1
公开(公告)日:2021-09-23
申请号:US17321707
申请日:2021-05-17
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
Inventor: Yongyao LI , Fei LUO , Jiankang LI , Jiang ZHU , Jieping ZENG
Abstract: This application provides a drive and a data transmission method, to implement low-latency transmission. The drive includes a CDR circuit, an elastic buffer, a receiver circuit, and a transmitter circuit. The CDR circuit is configured to recover a receive clock from a received signal. The receiver circuit is configured to recover sent data from the received signal by using the receive clock. The elastic buffer is configured to move the sent data in by using the receive clock and move the data out by using the receive clock. The transmitter circuit is configured to send the sent data from the elastic buffer by using the receive clock.
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公开(公告)号:US20210075647A1
公开(公告)日:2021-03-11
申请号:US17100033
申请日:2020-11-20
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
Inventor: Yongyao LI , Fei LUO , Er NIE
Abstract: A fast equalization method is provided, which includes: storing a receive parameter and a transmit parameter, of each of a primary chip and a secondary chip, that meet a link stability requirement and that are obtained when link equalization is previously performed; and when determining that link equalization needs to be performed, configuring, as first fast equalization timeout duration, a larger value in initial fast equalization timeout duration of the primary chip and initial fast equalization timeout duration of the secondary chip, and invoking the foregoing receive and transmit parameters, so that the primary chip and the secondary chip perform a current time of link equalization based on the first fast equalization timeout duration and the foregoing transmit and receive parameters.
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公开(公告)号:US20240414032A1
公开(公告)日:2024-12-12
申请号:US18810900
申请日:2024-08-21
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
Inventor: Yongyao LI , Fei LUO , Jiang ZHU
IPC: H04L25/03
Abstract: An equalization training method and apparatus are described. The method includes obtaining a training rate of each of a master chip and a slave chip in a target phase of equalization training. The method also includes determining a target rate threshold interval within which the training rate in the target phase falls, determining, based on a correspondence between N+1 rate threshold intervals and N+1 equalization timeout periods, a target equalization timeout period corresponding to the target rate threshold interval, and configuring the target equalization timeout period as an equalization timeout period in the target phase. Accordingly, an equalization timeout period used for equalization training can be configured for each equalization training process, so that the configured equalization timeout period better conforms to a training rate currently used for link negotiation, to ensure that an equalization parameter is found within the configured equalization timeout period, improving an equalization training success rate.
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公开(公告)号:US20250024462A1
公开(公告)日:2025-01-16
申请号:US18900115
申请日:2024-09-27
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
Inventor: Xinyue FAN , Fei LUO , Leibing SHAO , Zhengqing BAO
IPC: H04W72/231 , H04L1/00 , H04W72/51 , H04W76/20
Abstract: A terminal scheduling method and apparatus, a base station, and a medium are disclosed. In an example method, when a physical downlink control channel (PDCCH) allocated for downlink control information (DCI0) used to schedule a terminal device is located in common search space, and enable uplink 256QAM is configured for the terminal device, the base station determines that a modulation and coding scheme (MCS) index value in the DCI0 is 0. The base station sends the DCI0 to the terminal device through the PDCCH.
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公开(公告)号:US20230094563A1
公开(公告)日:2023-03-30
申请号:US17959490
申请日:2022-10-04
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
Inventor: Yongyao LI , Fei LUO , Er NIE
Abstract: A fast equalization method is provided, which includes: storing a receive parameter and a transmit parameter, of each of a primary chip and a secondary chip, that meet a link stability requirement and that are obtained when link equalization is previously performed; and when determining that link equalization needs to be performed, configuring, as first fast equalization timeout duration, a larger value in initial fast equalization timeout duration of the primary chip and initial fast equalization timeout duration of the secondary chip, and invoking the foregoing receive and transmit parameters, so that the primary chip and the secondary chip perform a current time of link equalization based on the first fast equalization timeout duration and the foregoing transmit and receive parameters.
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公开(公告)号:US20210263879A1
公开(公告)日:2021-08-26
申请号:US17315715
申请日:2021-05-10
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
Inventor: Yongyao LI , Fei LUO , Jiankang LI , Jie WAN , Gongxian JIA
Abstract: A retimer application system is provided, which includes a primary chip, a retimer, and a secondary chip. After first link training is completed, the retimer is configured to store, in a first storage area, an equalization parameter corresponding to each rate during the first link training, and data stored in the first storage area is not lost when the retimer performs a reset operation. The retimer is further configured to: receive a reset indication, and perform the reset operation according to the reset indication. The primary chip and the secondary chip are configured to perform second link training triggered by the reset indication. During the second link training, the retimer is further configured to: invoke the equalization parameter, and transparently transmit a training sequence in the second link training to the primary chip or the secondary chip based on the equalization parameter.
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