公开(公告)号：US20230054139A1

公开(公告)日：2023-02-23

申请号：US18048854

申请日：2022-10-23

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Jiangzheng Cai ,  Mingen Bu ,  Yuzheng Jin ,  Yuqing Zhang

IPC: G11C11/419 ,  G11C11/412

Abstract: A storage array includes a read bit line, a ground, a read bit line switch of the read bit line, and a plurality of storage circuits. Each storage circuit includes a storage unit configured to store data and a read circuit configured to read data from the storage unit. A data input end of the read circuit is connected to a data output end of the storage unit, to read data from the storage circuit, and a data output end of the read circuit is connected to the read bit line, to output the read data to the read bit line. There is at least one PMOS transistor in an electric leakage path from a power supply to the read bit line in the read circuit, to suppress a leakage current in the read circuit.

公开(公告)号：US12106802B2

公开(公告)日：2024-10-01

申请号：US18048854

申请日：2022-10-23

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Jiangzheng Cai ,  Mingen Bu ,  Yuzheng Jin ,  Yuqing Zhang

IPC: G11C11/419 ,  G11C11/412

CPC classification number: G11C11/419 ,  G11C11/412

Abstract: A storage array includes a read bit line, a ground, a read bit line switch of the read bit line, and a plurality of storage circuits. Each storage circuit includes a storage unit configured to store data and a read circuit configured to read data from the storage unit. A data input end of the read circuit is connected to a data output end of the storage unit, to read data from the storage circuit, and a data output end of the read circuit is connected to the read bit line, to output the read data to the read bit line. There is at least one PMOS transistor in an electric leakage path from a power supply to the read bit line in the read circuit, to suppress a leakage current in the read circuit.