公开(公告)号：US20240184521A1

公开(公告)日：2024-06-06

申请号：US18440254

申请日：2024-02-13

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Tengyi LIN ,  Kai WANG ,  Qin WANG

IPC: G06F7/02 ,  G06F7/50 ,  G06F7/523

CPC classification number: G06F7/02 ,  G06F7/50 ,  G06F7/523

Abstract: The computation apparatus includes a position coordinate comparison circuit and a logical operation circuit. The position coordinate comparison circuit is configured to compare position coordinates of an element value in a first vector with position coordinates of an element value in a second vector, to obtain a coordinate comparison result. The logical operation circuit is configured to compute the first element value and the second element value based on a first comparison result, to obtain a computation value; and output a computation result to a cache. The computation result is related to the computation value. In comparison with a conventional method in which a vector in a compressed format needs to be decompressed first, and then vector computation is performed on a decompressed vector, the computation apparatus can effectively improve efficiency of computing the vector in the compressed format.