公开(公告)号：US20250022490A1

公开(公告)日：2025-01-16

申请号：US18266610

申请日：2022-04-20

Applicant: HUAZHONG UNIVERSITY OF SCIENCE AND TECHNOLOGY

Inventor： Xiangshui MIAO ,  Jiawei FU ,  Yuhui HE

IPC: G11C5/02 ,  G06N3/0464 ,  G11C5/06

Abstract: The disclosure provides a convolution operation accelerator and a convolution operation method and belongs to the field of microelectronic devices. Input data of each word line may be subjected to a multiply-accumulate operation together with two upper and lower layers of convolution kernel units, so that natural sliding of the convolution kernel units in a y direction in two-dimensional input is achieved. The oblique bit lines and multiple copies of a convolution kernel in each layer of a non-volatile memory array may enable a multiplication operation between one piece of input data and convolution kernel data at different positions in the same convolution kernel. In this way, the natural sliding of the convolution kernel units in an x direction in the two-dimensional input is achieved.