公开(公告)号：US20120161813A1

公开(公告)日：2012-06-28

申请号：US13305446

申请日：2011-11-28

Applicant: Han Jin CHO ,  Young Hwan BAE

Inventor： Han Jin CHO ,  Young Hwan BAE

IPC: H03K19/177

CPC classification number: H03K19/17748 ,  H03K19/0008

Abstract: A switch apparatus of a Field Programmable Gate Array (FPGA) includes a pass transistor configured to switch and transfer an input signal to a logic cell according to a value of a configuration memory, and a voltage maintaining unit connected between the configuration memory and a gate of the pass transistor and configured to delay a drop of a gate voltage.

Abstract translation: 现场可编程门阵列（FPGA）的开关装置包括：传输晶体管，被配置为根据配置存储器的值来切换输入信号并将其传送到逻辑单元;以及电压保持单元，连接在配置存储器和门 并且被配置为延迟栅极电压的下降。

公开(公告)号：US20120167023A1

公开(公告)日：2012-06-28

申请号：US13310580

申请日：2011-12-02

Applicant: Young Hwan BAE

Inventor： Young Hwan BAE

IPC: G06F17/50

CPC classification number: G06F17/5054 ,  G06F17/5077

Abstract: A method for synthesizing a tile interconnection structure of a field programmable gate array (FPGA) includes: receiving an interconnection structure specification of the FPGA; constructing a tile interconnection graph based on the interconnection structure specification; converting the interconnection structure specification into a connection diagram between two points on the tile interconnection graph; searching for a shortest path for connection requirements between two points from the connection diagram between two points, and building a bundle structure; and synthesizing a tile interconnection structure from the bundle structure.

Abstract translation: 一种用于合成现场可编程门阵列（FPGA）的瓦片互连结构的方法包括：接收FPGA的互连结构规范; 基于互连结构规范构建瓦片互连图; 将互连结构规范转换为瓦片互连图上两点之间的连接图; 从两点之间的连接图中搜索两点之间的连接要求的最短路径，并构建捆绑结构; 以及从所述束结构合成瓦片互连结构。