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公开(公告)号：US08417759B2
公开(公告)日：2013-04-09
申请号：US11939456
申请日：2007-11-13
IPC分类号： G06F17/16
CPC分类号： G06F17/153 , G06T5/20 , G06T2207/10024
摘要： A method and apparatus for efficiently performing digital signal processing is provided. In one embodiment, kernel matrix computations are simplified by grouping similar kernel coefficients together. Each coefficient group contains only coefficients having the same value. At least one of the coefficient groups has at least two coefficients. Techniques are disclosed herein to efficiently apply successive first order difference operations to a data signal. The techniques allow for a low gate count. In particular, the techniques allow for a reduction of the number of multipliers without increasing clock frequency, in an embodiment. The techniques update pixels of a data signal at a rate of two clock cycles per each pixel, in an embodiment. The techniques allow hardware that is used to process a first pixel to be re-used to start the processing of a second pixel while the first pixel is still being processed.
摘要翻译： 提供了一种有效执行数字信号处理的方法和装置。 在一个实施例中，通过将相似的内核系数分组在一起来简化核矩阵计算。 每个系数组仅包含具有相同值的系数。 至少一个系数组具有至少两个系数。 本文公开的技术有效地将连续的一阶差分运算应用于数据信号。 这些技术允许低门数。 具体地，在一个实施例中，这些技术允许减少乘法器的数量而不增加时钟频率。 在一个实施例中，这些技术以每个像素的两个时钟周期的速率更新数据信号的像素。 这些技术允许用于处理要重新使用的第一像素的硬件，以在第一像素仍在处理时开始第二像素的处理。
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公开(公告)号：US20080250094A1
公开(公告)日：2008-10-09
申请号：US11939456
申请日：2007-11-13
IPC分类号： G06F17/16
CPC分类号： G06F17/153 , G06T5/20 , G06T2207/10024
摘要： A method and apparatus for efficiently performing digital signal processing is provided. In one embodiment, kernel matrix computations are simplified by grouping similar kernel coefficients together. Each coefficient group contains only coefficients having the same value. At least one of the coefficient groups has at least two coefficients. Techniques are disclosed herein to efficiently apply successive first order difference operations to a data signal. The techniques allow for a low gate count. In particular, the techniques allow for a reduction of the number of multipliers without increasing clock frequency, in an embodiment. The techniques update pixels of a data signal at a rate of two clock cycles per each pixel, in an embodiment. The techniques allow hardware that is used to process a first pixel to be re-used to start the processing of a second pixel while the first pixel is still being processed.
摘要翻译： 提供了一种有效执行数字信号处理的方法和装置。 在一个实施例中，通过将相似的内核系数分组在一起来简化核矩阵计算。 每个系数组仅包含具有相同值的系数。 至少一个系数组具有至少两个系数。 本文公开的技术有效地将连续的一阶差分运算应用于数据信号。 这些技术允许低门数。 具体地，在一个实施例中，这些技术允许减少乘法器的数量而不增加时钟频率。 在一个实施例中，这些技术以每个像素的两个时钟周期的速率更新数据信号的像素。 这些技术允许用于处理要重新使用的第一像素的硬件，以在第一像素仍在处理时开始第二像素的处理。
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公开(公告)号：US11820352B2
公开(公告)日：2023-11-21
申请号：US17248648
申请日：2021-02-01
申请人： Kurt Neutgens , Christopher Loo
发明人： Kurt Neutgens , Christopher Loo
CPC分类号： B60T7/20 , B60T7/16 , B60T17/086
摘要： A remote caging system and method for remote caging for semi-trailer brakes is provided. The remote caging system comprises a remote control device, and a remote caging apparatus including a transmitter/receiver. The remote caging apparatus is installed on a semi-trailer truck brake. The remote control device sends and receives signals to and from the transmitter/receiver to engage and disengage the brakes.
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公开(公告)号：US20210237697A1
公开(公告)日：2021-08-05
申请号：US17248648
申请日：2021-02-01
申请人： Kurt Neutgens , Christopher Loo
发明人： Kurt Neutgens , Christopher Loo
摘要： A remote caging system and method for remote caging for semi-trailer brakes is provided. The remote caging system comprises a remote control device, and a remote caging apparatus including a transmitter/receiver. The remote caging apparatus is installed on a semi-trailer truck brake. The remote control device sends and receives signals to and from the transmitter/receiver to engage and disengage the brakes.
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