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    Reducing content addressable memory (CAM) power consumption counters
    1.
    发明授权
    Reducing content addressable memory (CAM) power consumption counters 有权
    减少内容可寻址内存（CAM）功耗计数器

    公开(公告)号：US07680978B1

    公开(公告)日：2010-03-16

    申请号：US11850074

    申请日：2007-09-05

    申请人： Harsha Narayan ,  Kenneth Huang ,  Ruturaj Pathak ,  Soren B. Pedersen

    发明人： Harsha Narayan ,  Kenneth Huang ,  Ruturaj Pathak ,  Soren B. Pedersen

    IPC分类号： G06F12/00

    CPC分类号： G06F12/0811 ,  G11C15/00 ,  Y02D10/13

    摘要： A method may include counting the number of times each of a plurality of entries in a content addressable memory (CAM) matches one or more searches; grouping entries in the CAM into a first subset and a second subset based on the number of times each of the plurality of entries in the CAM matches one or more searches; and searching the first subset for a matching entry and, if no matching entry is found, searching the second subset for the matching entry.

    摘要翻译： 一种方法可以包括对内容可寻址存储器（CAM）中的多个条目中的每一个条目匹配一次或多次搜索的次数进行计数; 基于CAM中的多个条目中的每一个与一个或多个搜索匹配的次数将CAM中的条目分组成第一子集和第二子集; 以及搜索所述第一子集以获得匹配条目，并且如果没有找到匹配条目，则搜索所述第二子集以获得所述匹配条目。

    Fused switch core and method for a telecommunications node
    2.
    发明授权
    Fused switch core and method for a telecommunications node 有权
    用于电信节点的熔断开关核心和方法

    公开(公告)号：US06621828B1

    公开(公告)日：2003-09-16

    申请号：US09452759

    申请日：1999-12-01

    申请人： Barry W. Field ,  Kenneth M. Buckland ,  Charles R. Dyer ,  Riccardo G. Dorbolo ,  Danny Thom ,  Jan C. Hobbel ,  Soren B. Pedersen ,  Thomas A. Potter

    发明人： Barry W. Field ,  Kenneth M. Buckland ,  Charles R. Dyer ,  Riccardo G. Dorbolo ,  Danny Thom ,  Jan C. Hobbel ,  Soren B. Pedersen ,  Thomas A. Potter

    IPC分类号： H04J316

    CPC分类号： H04Q11/04 ,  H04Q2213/13103 ,  H04Q2213/1329 ,  H04Q2213/13292 ,  H04Q2213/13299 ,  H04Q2213/13361 ,  H04Q2213/13362 ,  H04Q2213/13393

    摘要： A switch card for telecommunications node includes a shared memory operable to store traffic channels. A time slot interchanger (TSI) is coupled to a first bus and to the shared memory. The TSI is operable based on predefined switching instructions to access the shared memory to stored traffic channels received from the first bus and to retrieve traffic channels for transmission on the first bus. An asynchronous transfer mode (ATM) switch is operable to switch a traffic cell based on header information in the traffic cell. A traffic converter is operable to convert traffic channels retrieved from the shared memory to traffic cells for processing by a bus fuser and to convert traffic cells to traffic channels for storage in the shared memory. The bus fuser is coupled to the shared memory through the traffic converter, the ATM switch, and a second bus. The bus fuser is operable to receive a traffic cell from each one of the traffic converter, the ATM switch, and the second bus and to route the traffic cell to another one of the traffic converter, the ATM switch, and the second bus.

    摘要翻译： 用于电信节点的交换卡包括可操作以存储业务信道的共享存储器。 时隙交换器（TSI）耦合到第一总线和共享存储器。 TSI可以基于预定义的切换指令来操作，以将共享存储器存储到从第一总线接收的存储的业务信道，并且检索用于在第一总线上传输的业务信道。 异步传输模式（ATM）交换机可操作以基于业务信元中的报头信息来切换业务信元。 业务转换器可操作以将从共享存储器检索的业务信道转换成业务信元以供总线定影器处理，并将业务信元转换为业务信道以存储在共享存储器中。 总线定影器通过流量转换器，ATM交换机和第二总线耦合到共享存储器。 总线定影器可操作以从业务转换器，ATM交换机和第二总线中的每一个接收业务信元，并将业务小区路由到业务转换器，ATM交换机和第二总线中的另一个。

    Rate adjustable backplane and method for a telecommunications node
    4.
    发明授权
    Rate adjustable backplane and method for a telecommunications node 有权
    速率可调背板和电信节点的方法

    公开(公告)号：US06760327B1

    公开(公告)日：2004-07-06

    申请号：US09452829

    申请日：1999-12-01

    申请人： Earl B. Manchester ,  Barry W. Field ,  Kenneth M. Buckland ,  Charles R. Dyer ,  Riccardo G. Dorbolo ,  Danny Thom ,  Jan C. Hobbel ,  Soren B. Pedersen ,  Thomas A. Potter

    发明人： Earl B. Manchester ,  Barry W. Field ,  Kenneth M. Buckland ,  Charles R. Dyer ,  Riccardo G. Dorbolo ,  Danny Thom ,  Jan C. Hobbel ,  Soren B. Pedersen ,  Thomas A. Potter

    IPC分类号： H04L1228

    CPC分类号： H04L49/606 ,  H04L12/6402

    摘要： A rate adjustable backplane includes a set of switch slots configured to receive one or more switch cards forming a switch core and a plurality of line slots each configured to receive a line card. A low speed bus couples the line slots to the set of switch slots. A high speed bus also couples the line slots to the set of switch slots. Each line slot includes a low speed connector coupled to the low speed bus and a high speed connector coupled to the high speed bus. The low speed connector is adapted to receive a mating connector of a line card to establish a low speed communication connection between the line card and the switch core. The high speed connector is adapted to receive a mating connector of the line card to establish a high speed link between the line card and the switch core.

    摘要翻译： 速率可调背板包括一组开关槽，其被配置为接收形成开关芯的一个或多个开关卡和多个配置成接收线卡的线槽。 低速总线将线路插槽连接到交换机插槽组。 高速总线也将线槽耦合到一组开关插槽。 每个线槽包括耦合到低速总线的低速连接器和耦合到高速总线的高速连接器。 低速连接器适于接收线路卡的匹配连接器，以在线路卡和交换机核心之间建立低速通信连接。 高速连接器适于接收线路卡的匹配连接器，以在线路卡和交换机核心之间建立高速链路。