Display control apparatus
    1.
    发明授权
    Display control apparatus 有权
    显示控制装置

    公开(公告)号:US08583999B2

    公开(公告)日:2013-11-12

    申请号:US13197745

    申请日:2011-08-03

    IPC分类号: G06F11/00

    摘要: A display control apparatus includes a comparison control unit which performs a cyclic redundancy check over an arbitrary region of image data. The comparison control unit includes a region control unit which selects a region of the image data based on comparison region information for specifying an arbitrary region of the image displayed on the display unit as a cyclic redundancy check target region, an arithmetic processing unit which performs arithmetic processing for the cyclic redundancy check over a region selected by the region control unit, and a comparison circuit which performs error detection by comparing the result of the arithmetic processing by the arithmetic processing unit with its expected value. Error detection by the cyclic redundancy check is performed only on the target region of the cyclic redundancy check in the arbitrary region, which facilitates the cyclic redundancy check.

    摘要翻译: 显示控制装置包括比较控制单元,其对图像数据的任意区域执行循环冗余校验。 比较控制单元包括:区域控制单元,其基于用于指定在显示单元上显示的图像的任意区域作为循环冗余校验目标区域的比较区域信息来选择图像数据的区域;运算处理单元,其执行算术 对由区域控制单元选择的区域进行循环冗余校验的处理;以及比较电路,其通过将运算处理单元的算术处理结果与其期望值进行比较来进行错误检测。 仅在任意区域的循环冗余校验的目标区域上进行循环冗余校验的错误检测,有利于循环冗余校验。

    DISPLAY CONTROL APPARATUS
    2.
    发明申请
    DISPLAY CONTROL APPARATUS 有权
    显示控制装置

    公开(公告)号:US20120036418A1

    公开(公告)日:2012-02-09

    申请号:US13197745

    申请日:2011-08-03

    IPC分类号: H03M13/09 G06F11/10

    摘要: To enable an instrument panel to appropriately check whether or not data display is normal.A display control apparatus includes a display output control unit and a CPU. The display output control unit includes a comparison control unit which performs a cyclic redundancy check over an arbitrary region of image data. The comparison control unit includes a region control unit which selects a region of the image data based on comparison region information for specifying an arbitrary region of the image displayed on the display unit as a cyclic redundancy check target region, an arithmetic processing unit which performs arithmetic processing for the cyclic redundancy check over a region selected by the region control unit, and a comparison circuit which performs error detection by comparing the result of the arithmetic processing by the arithmetic processing unit with its expected value. Error detection by the cyclic redundancy check is performed only on the target region of the cyclic redundancy check in the arbitrary region, which facilitates the cyclic redundancy check.

    摘要翻译: 要使仪表板能够正确检查数据显示是否正常。 显示控制装置包括显示输出控制单元和CPU。 显示输出控制单元包括对图像数据的任意区域执行循环冗余校验的比较控制单元。 比较控制单元包括:区域控制单元,其基于用于指定在显示单元上显示的图像的任意区域作为循环冗余校验目标区域的比较区域信息来选择图像数据的区域;算术处理单元,其执行算术 对由区域控制单元选择的区域进行循环冗余校验的处理;以及比较电路,其通过将运算处理单元的算术处理结果与其期望值进行比较来进行错误检测。 仅在任意区域的循环冗余校验的目标区域上进行循环冗余校验的错误检测,有利于循环冗余校验。

    Data processor and data processing system
    3.
    发明授权
    Data processor and data processing system 失效
    数据处理器和数据处理系统

    公开(公告)号:US06351788B1

    公开(公告)日:2002-02-26

    申请号:US09297310

    申请日:1999-06-10

    IPC分类号: G06F1300

    CPC分类号: G06F12/0864

    摘要: A data processor including a central processing unit and a plurality of direct map cache memories (3, 4) has a plurality of area designating circuits (5, 6) for variably designating location and size of address area in the memory space managed the central processing unit and partially overlaps the address area designated by a plurality of area designating circuits. Thereby, the overlapped area (Eco) has a function as the 2-way set associative cache memory in combination with a plurality of cache memories. For the non-overlapping area, respective cache memory functions as the direct map cache memory. It is previously judged to attain the necessary data processing capability by arranging which processing routine to which address area and then executing such routine with what processing speed. Thereby, when cache object area is assigned to a plurality of cache memory, a plurality of cache memories are combined as a set associative cache for operation to the task which particularly requires high speed operation or to the data. As a result, the system can be optimized by improving the cache hit rate of the necessary area.

    摘要翻译: 包括中央处理单元和多个直接地图高速缓存存储器(3,4)的数据处理器具有多个区域指定电路(5,6),用于可变地指定存储器空间中的地址区域的位置和大小来管理中央处理 单元并且部分地重叠由多个区域指定电路指定的地址区域。 因此,重叠区域(Eco)具有与多个高速缓存存储器组合的2路组合关联高速缓冲存储器的功能。 对于非重叠区域,各个高速缓冲存储器用作直接映射高速缓冲存储器。 先前通过安排哪个处理例程到达哪个地址区域,然后以什么处理速度执行这种例程,以前被判定为获得必要的数据处理能力。 因此,当将高速缓存对象区域分配给多个高速缓冲存储器时,将多个高速缓存存储器组合为用于操作的组关联高速缓存,特别需要高速操作或数据。 因此,可以通过提高必要区域的缓存命中率来优化系统。